| Patrick Delaunay | 00202f7 | 2022-10-11 16:44:26 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause |
| 2 | /* |
| 3 | * Copyright (C) 2022, STMicroelectronics - All Rights Reserved |
| 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | #include <debug_uart.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/stm32.h> |
| 10 | #include <linux/bitops.h> |
| 11 | |
| 12 | #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) |
| 13 | #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) |
| 14 | |
| 15 | #define GPIOG_BASE 0x50008000 |
| 16 | |
| 17 | void board_debug_uart_init(void) |
| 18 | { |
| 19 | if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) { |
| 20 | /* UART4 clock enable */ |
| 21 | setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); |
| 22 | |
| 23 | /* GPIOG clock enable */ |
| 24 | writel(BIT(6), RCC_MP_AHB4ENSETR); |
| 25 | /* GPIO configuration for ST boards: Uart4 TX = G11 */ |
| 26 | writel(0xffbfffff, GPIOG_BASE + 0x00); |
| 27 | writel(0x00006000, GPIOG_BASE + 0x24); |
| 28 | } |
| 29 | } |