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Pali Rohár248ef0a2012-10-29 07:54:01 +00001/*
2 * (C) Copyright 2011-2012
3 * Pali Rohár <pali.rohar@gmail.com>
4 *
5 * (C) Copyright 2010
6 * Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * Derived from Beagle Board code:
9 * (C) Copyright 2006-2008
10 * Texas Instruments.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 * Syed Mohammed Khasim <x0khasim@ti.com>
13 *
14 * Configuration settings for the Nokia RX-51 aka N900.
15 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020016 * SPDX-License-Identifier: GPL-2.0+
Pali Rohár248ef0a2012-10-29 07:54:01 +000017 */
18
19#ifndef __CONFIG_H
20#define __CONFIG_H
21
22/*
23 * High Level Configuration Options
24 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000025#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
26
27#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
28
29/*
30 * Nokia X-Loader loading secondary image to address 0x80400000
31 * NOLO loading boot image to random place, so it doesn't really
32 * matter what we set this to. We have to copy u-boot to this address
33 */
34#define CONFIG_SYS_TEXT_BASE 0x80008000
35
36#define CONFIG_SDRC /* The chip has SDRC controller */
37
38#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050039#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000040#include <asm/arch/mem.h>
41#include <linux/stringify.h>
42
Pali Rohár248ef0a2012-10-29 07:54:01 +000043/* Clock Defines */
44#define V_OSCK 26000000 /* Clock output from T2 */
45#define V_SCLK (V_OSCK >> 1)
46
Pali Rohár248ef0a2012-10-29 07:54:01 +000047#define CONFIG_MISC_INIT_R
48#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
49
50#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
51#define CONFIG_INITRD_TAG /* enable passing initrd */
52#define CONFIG_REVISION_TAG /* enable passing revision tag*/
53#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
54
55/*
56 * Size of malloc() pool
57 */
58#define CONFIG_ENV_SIZE (128 << 10)
59#define CONFIG_UBI_SIZE (512 << 10)
60#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
61 (128 << 10))
62
63/*
64 * Hardware drivers
65 */
66
67/*
68 * NS16550 Configuration
69 */
70#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
71
Pali Rohár248ef0a2012-10-29 07:54:01 +000072#define CONFIG_SYS_NS16550_SERIAL
73#define CONFIG_SYS_NS16550_REG_SIZE (-4)
74#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
75
76/*
77 * select serial console configuration
78 */
79#define CONFIG_CONS_INDEX 3
80#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
81#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
82
83/* allow to overwrite serial and ethaddr */
84#define CONFIG_ENV_OVERWRITE
Pali Rohár248ef0a2012-10-29 07:54:01 +000085#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000086
87/* USB */
Paul Kocialkowskif34dfcb2015-08-04 17:04:06 +020088#define CONFIG_USB_MUSB_UDC
89#define CONFIG_USB_MUSB_HCD
Pali Rohár248ef0a2012-10-29 07:54:01 +000090#define CONFIG_USB_OMAP3
91#define CONFIG_TWL4030_USB
92
93/* USB device configuration */
94#define CONFIG_USB_DEVICE
95#define CONFIG_USBD_VENDORID 0x0421
96#define CONFIG_USBD_PRODUCTID 0x01c8
97#define CONFIG_USBD_MANUFACTURER "Nokia"
98#define CONFIG_USBD_PRODUCT_NAME "N900"
99
Pali Rohár248ef0a2012-10-29 07:54:01 +0000100/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000101
102#define CONFIG_CMDLINE_EDITING /* add command line history */
103#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
104
Pali Rohár248ef0a2012-10-29 07:54:01 +0000105#ifdef ONENAND_SUPPORT
106
107#define CONFIG_CMD_ONENAND /* ONENAND support */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000108
Pali Rohár248ef0a2012-10-29 07:54:01 +0000109#endif
110
Pali Rohár248ef0a2012-10-29 07:54:01 +0000111#define CONFIG_OMAP3_SPI
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200112#define CONFIG_SYS_I2C
113#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
114#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
115#define CONFIG_SYS_I2C_OMAP34XX
Pali Rohár248ef0a2012-10-29 07:54:01 +0000116
117/*
118 * TWL4030
119 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000120#define CONFIG_TWL4030_LED
121#define CONFIG_TWL4030_KEYPAD
122
Pali Rohár248ef0a2012-10-29 07:54:01 +0000123#define GPIO_SLIDE 71
124
125/*
126 * Board ONENAND Info.
127 */
128
129#define PART1_NAME "bootloader"
130#define PART1_SIZE 128
131#define PART1_MULL 1024
132#define PART1_SUFF "k"
133#define PART1_OFFS 0x00000000
134#define PART1_MASK 0x00000003
135
136#define PART2_NAME "config"
137#define PART2_SIZE 384
138#define PART2_MULL 1024
139#define PART2_SUFF "k"
140#define PART2_OFFS 0x00020000
141#define PART2_MASK 0x00000000
142
143#define PART3_NAME "log"
144#define PART3_SIZE 256
145#define PART3_MULL 1024
146#define PART3_SUFF "k"
147#define PART3_OFFS 0x00080000
148#define PART3_MASK 0x00000000
149
150#define PART4_NAME "kernel"
151#define PART4_SIZE 2
152#define PART4_MULL 1024*1024
153#define PART4_SUFF "m"
154#define PART4_OFFS 0x000c0000
155#define PART4_MASK 0x00000000
156
157#define PART5_NAME "initfs"
158#define PART5_SIZE 2
159#define PART5_MULL 1024*1024
160#define PART5_SUFF "m"
161#define PART5_OFFS 0x002c0000
162#define PART5_MASK 0x00000000
163
164#define PART6_NAME "rootfs"
165#define PART6_SIZE 257280
166#define PART6_MULL 1024
167#define PART6_SUFF "k"
168#define PART6_OFFS 0x004c0000
169#define PART6_MASK 0x00000000
170
171#ifdef ONENAND_SUPPORT
172
Pali Rohár248ef0a2012-10-29 07:54:01 +0000173#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
174#define CONFIG_MTD_DEVICE
175#define CONFIG_MTD_PARTITIONS
176
Pali Rohár248ef0a2012-10-29 07:54:01 +0000177#define MTDIDS_DEFAULT "onenand0=onenand"
178#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
179 __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
180 __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
181 __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
182 __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
183 __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
184 "-(" PART6_NAME ")"
185
186#endif
187
188/* Watchdog support */
189#define CONFIG_HW_WATCHDOG
190
191/*
192 * Framebuffer
193 */
194/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000195#define CONFIG_VIDEO_LOGO
196#define VIDEO_FB_16BPP_PIXEL_SWAP
197#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +0000198#define CONFIG_SPLASH_SCREEN
199
200/* functions for cfb_console */
201#define VIDEO_KBD_INIT_FCT rx51_kp_init()
202#define VIDEO_TSTC_FCT rx51_kp_tstc
203#define VIDEO_GETC_FCT rx51_kp_getc
204#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600205struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000206int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600207int rx51_kp_tstc(struct stdio_dev *sdev);
208int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000209#endif
210
211#ifndef MTDPARTS_DEFAULT
212#define MTDPARTS_DEFAULT
213#endif
214
215/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000216#define CONFIG_EXTRA_ENV_SETTINGS \
217 "mtdparts=" MTDPARTS_DEFAULT "\0" \
218 "usbtty=cdc_acm\0" \
219 "stdin=vga\0" \
220 "stdout=vga\0" \
221 "stderr=vga\0" \
222 "setcon=setenv stdin ${con};" \
223 "setenv stdout ${con};" \
224 "setenv stderr ${con}\0" \
225 "sercon=setenv con serial; run setcon\0" \
226 "usbcon=setenv con usbtty; run setcon\0" \
227 "vgacon=setenv con vga; run setcon\0" \
228 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
229 "switchmmc=mmc dev ${mmcnum}\0" \
230 "kernaddr=0x82008000\0" \
231 "initrdaddr=0x84008000\0" \
232 "scriptaddr=0x86008000\0" \
233 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
234 "${loadaddr} ${mmcfile}\0" \
235 "kernload=setenv loadaddr ${kernaddr};" \
236 "setenv mmcfile ${mmckernfile};" \
237 "run fileload\0" \
238 "initrdload=setenv loadaddr ${initrdaddr};" \
239 "setenv mmcfile ${mmcinitrdfile};" \
240 "run fileload\0" \
241 "scriptload=setenv loadaddr ${scriptaddr};" \
242 "setenv mmcfile ${mmcscriptfile};" \
243 "run fileload\0" \
244 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
245 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
246 "kernboot=echo Booting ${mmckernfile} from mmc " \
247 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
248 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
249 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
250 "attachboot=echo Booting attached kernel image ...;" \
251 "setenv setup_omap_atag 1;" \
252 "bootm ${attkernaddr};" \
253 "setenv setup_omap_atag\0" \
254 "trymmcscriptboot=if run switchmmc; then " \
255 "if run scriptload; then " \
256 "run scriptboot;" \
257 "fi;" \
258 "fi\0" \
259 "trymmckernboot=if run switchmmc; then " \
260 "if run kernload; then " \
261 "run kernboot;" \
262 "fi;" \
263 "fi\0" \
264 "trymmckerninitrdboot=if run switchmmc; then " \
265 "if run initrdload; then " \
266 "if run kernload; then " \
267 "run kerninitrdboot;" \
268 "fi;" \
269 "fi; " \
270 "fi\0" \
271 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
272 "setenv mmckernfile uImage; run trymmckernboot\0" \
273 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
274 "setenv mmcpart 2; run trymmcpartboot;" \
275 "setenv mmcpart 3; run trymmcpartboot;" \
276 "setenv mmcpart 4; run trymmcpartboot\0" \
277 "trymmcboot=if run switchmmc; then " \
278 "setenv mmctype fat;" \
279 "run trymmcallpartboot;" \
280 "setenv mmctype ext2;" \
281 "run trymmcallpartboot;" \
282 "setenv mmctype ext4;" \
283 "run trymmcallpartboot;" \
284 "fi\0" \
285 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
286 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000287 "menucmd=bootmenu\0" \
288 "bootmenu_0=Attached kernel=run attachboot\0" \
289 "bootmenu_1=Internal eMMC=run emmcboot\0" \
290 "bootmenu_2=External SD card=run sdboot\0" \
291 "bootmenu_3=U-Boot boot order=boot\0" \
292 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000293 ""
294
295#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000296 "setenv mmcnum 1; setenv mmcpart 1;" \
297 "setenv mmcscriptfile bootmenu.scr;" \
298 "if run switchmmc; then " \
299 "setenv mmcdone true;" \
300 "setenv mmctype fat;" \
301 "if run scriptload; then true; else " \
302 "setenv mmctype ext2;" \
303 "if run scriptload; then true; else " \
304 "setenv mmctype ext4;" \
305 "if run scriptload; then true; else " \
306 "setenv mmcdone false;" \
307 "fi;" \
308 "fi;" \
309 "fi;" \
310 "if ${mmcdone}; then " \
311 "run scriptboot;" \
312 "fi;" \
313 "fi;" \
314 "if run slide; then true; else " \
315 "setenv bootmenu_delay 0;" \
316 "setenv bootdelay 0;" \
317 "fi"
318
319#define CONFIG_POSTBOOTMENU \
320 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000321 "echo Extra commands:;" \
322 "echo run sercon - Use serial port for control.;" \
323 "echo run usbcon - Use usbtty for control.;" \
324 "echo run vgacon - Use framebuffer/keyboard.;" \
325 "echo run sdboot - Boot from SD card slot.;" \
326 "echo run emmcboot - Boot internal eMMC memory.;" \
327 "echo run attachboot - Boot attached kernel image.;" \
328 "echo"
329
330#define CONFIG_BOOTCOMMAND \
331 "run sdboot;" \
332 "run emmcboot;" \
333 "run attachboot;" \
334 "echo"
335
Pali Rohár13eb3e42013-03-07 05:15:19 +0000336#define CONFIG_MENU_SHOW
337
Pali Rohár248ef0a2012-10-29 07:54:01 +0000338/*
339 * Miscellaneous configurable options
340 */
341#define CONFIG_SYS_LONGHELP /* undef to save memory */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000342#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
343/* Print Buffer Size */
344#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
345 sizeof(CONFIG_SYS_PROMPT) + 16)
346#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
347/* Boot Argument Buffer Size */
348#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
349
350#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
351#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
352
353/* default load address */
354#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
355
356/*
357 * OMAP3 has 12 GP timers, they can be driven by the system clock
358 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
359 * This rate is divided by a local divisor.
360 */
361#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
362#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000363
364/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000365 * Physical Memory Map
366 */
367#define CONFIG_NR_DRAM_BANKS 2
368#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
369
370/*
371 * FLASH and environment organization
372 */
373
Pali Rohár248ef0a2012-10-29 07:54:01 +0000374#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
375#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
376#define CONFIG_SYS_INIT_RAM_SIZE 0x800
377#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
378 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
379
380/*
381 * Attached kernel image
382 */
383
384#define SDRAM_SIZE 0x10000000 /* 256 MB */
385#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
386
387#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
388#define KERNEL_OFFSET 0x40000 /* 256 kB */
389#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
390#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
391
392/* Reserve protected RAM for attached kernel */
393#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
394
395#endif /* __CONFIG_H */