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Sudhakar Rajashekhara68921812010-06-10 15:18:15 +05301/*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on davinci_dvevm.h. Original Copyrights follow:
5 *
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
27 * Board
28 */
Ben Gardiner4b9538a2010-10-14 17:26:29 -040029#define CONFIG_DRIVER_TI_EMAC
Stefano Babicfc850ab2010-11-11 15:38:02 +010030#define CONFIG_USE_SPIFLASH
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053031
Nagabhushana Netagunte87539bf2011-09-03 22:18:32 -040032
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053033/*
34 * SoC Configuration
35 */
36#define CONFIG_MACH_DAVINCI_DA850_EVM
37#define CONFIG_ARM926EJS /* arm926ejs CPU core */
38#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
39#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40#define CONFIG_SYS_OSCIN_FREQ 24000000
41#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
42#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
43#define CONFIG_SYS_HZ 1000
44#define CONFIG_SKIP_LOWLEVEL_INIT
Sughosh Ganud16ff312010-10-23 00:58:03 +053045#define CONFIG_SYS_TEXT_BASE 0xc1080000
Nagabhushana Netagunte54647bb2011-09-03 22:17:37 -040046#define CONFIG_SYS_ICACHE_OFF
47#define CONFIG_SYS_DCACHE_OFF
48#define CONFIG_SYS_L2CACHE_OFF
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053049
50/*
51 * Memory Info
52 */
53#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053054#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
55#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
Ben Gardiner7618f612010-08-23 09:08:15 -040056#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053057
58/* memtest start addr */
59#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
60
61/* memtest will be run on 16MB */
62#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
63
64#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
65#define CONFIG_STACKSIZE (256*1024) /* regular stack */
66
67/*
68 * Serial Driver info
69 */
70#define CONFIG_SYS_NS16550
71#define CONFIG_SYS_NS16550_SERIAL
72#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
73#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
74#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
75#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
76#define CONFIG_BAUDRATE 115200 /* Default baud rate */
77#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
78
Stefano Babicfc850ab2010-11-11 15:38:02 +010079#define CONFIG_SPI
80#define CONFIG_SPI_FLASH
81#define CONFIG_SPI_FLASH_STMICRO
82#define CONFIG_DAVINCI_SPI
83#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
84#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
85#define CONFIG_SF_DEFAULT_SPEED 30000000
86#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
87
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053088/*
89 * I2C Configuration
90 */
91#define CONFIG_HARD_I2C
92#define CONFIG_DRIVER_DAVINCI_I2C
93#define CONFIG_SYS_I2C_SPEED 25000
94#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
Sudhakar Rajashekhara5851e122010-11-18 09:59:37 -050095#define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053096
97/*
Ben Gardiner314305c2010-10-14 17:26:25 -040098 * Flash & Environment
99 */
100#ifdef CONFIG_USE_NAND
101#undef CONFIG_ENV_IS_IN_FLASH
102#define CONFIG_NAND_DAVINCI
103#define CONFIG_SYS_NO_FLASH
104#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
105#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
106#define CONFIG_ENV_SIZE (128 << 10)
107#define CONFIG_SYS_NAND_USE_FLASH_BBT
108#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
109#define CONFIG_SYS_NAND_PAGE_2K
110#define CONFIG_SYS_NAND_CS 3
111#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
112#define CONFIG_SYS_CLE_MASK 0x10
113#define CONFIG_SYS_ALE_MASK 0x8
114#undef CONFIG_SYS_NAND_HW_ECC
115#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
116#define NAND_MAX_CHIPS 1
Ben Gardiner314305c2010-10-14 17:26:25 -0400117#endif
118
119/*
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400120 * Network & Ethernet Configuration
121 */
122#ifdef CONFIG_DRIVER_TI_EMAC
123#define CONFIG_EMAC_MDIO_PHY_NUM 0
124#define CONFIG_MII
125#define CONFIG_BOOTP_DEFAULT
126#define CONFIG_BOOTP_DNS
127#define CONFIG_BOOTP_DNS2
128#define CONFIG_BOOTP_SEND_HOSTNAME
129#define CONFIG_NET_RETRY_COUNT 10
130#define CONFIG_NET_MULTI
131#endif
132
Nagabhushana Netagunte87539bf2011-09-03 22:18:32 -0400133#ifdef CONFIG_USE_NOR
134#define CONFIG_ENV_IS_IN_FLASH
135#define CONFIG_FLASH_CFI_DRIVER
136#define CONFIG_SYS_FLASH_CFI
137#define CONFIG_SYS_FLASH_PROTECTION
138#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
139#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */
140#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3)
141#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */
142#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
143#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */
144#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
145 + 3)
146#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ
147#endif
148
Stefano Babicfc850ab2010-11-11 15:38:02 +0100149#ifdef CONFIG_USE_SPIFLASH
150#undef CONFIG_ENV_IS_IN_FLASH
151#undef CONFIG_ENV_IS_IN_NAND
152#define CONFIG_ENV_IS_IN_SPI_FLASH
153#define CONFIG_ENV_SIZE (64 << 10)
154#define CONFIG_ENV_OFFSET (256 << 10)
155#define CONFIG_ENV_SECT_SIZE (64 << 10)
156#define CONFIG_SYS_NO_FLASH
157#endif
158
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400159/*
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530160 * U-Boot general configuration
161 */
162#define CONFIG_BOOTFILE "uImage" /* Boot file name */
163#define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */
164#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
165#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
166#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
167#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
168#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
169#define CONFIG_VERSION_VARIABLE
170#define CONFIG_AUTO_COMPLETE
171#define CONFIG_SYS_HUSH_PARSER
172#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
173#define CONFIG_CMDLINE_EDITING
174#define CONFIG_SYS_LONGHELP
175#define CONFIG_CRC32_VERIFY
176#define CONFIG_MX_CYCLIC
177
178/*
179 * Linux Information
180 */
Ben Gardiner14c2f7e2010-10-14 17:26:32 -0400181#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530182#define CONFIG_CMDLINE_TAG
Sekhar Nori6e112202010-11-19 11:39:48 -0500183#define CONFIG_REVISION_TAG
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530184#define CONFIG_SETUP_MEMORY_TAGS
185#define CONFIG_BOOTARGS \
186 "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
187#define CONFIG_BOOTDELAY 3
188
189/*
190 * U-Boot commands
191 */
192#include <config_cmd_default.h>
193#define CONFIG_CMD_ENV
194#define CONFIG_CMD_ASKENV
195#define CONFIG_CMD_DHCP
196#define CONFIG_CMD_DIAG
197#define CONFIG_CMD_MII
198#define CONFIG_CMD_PING
199#define CONFIG_CMD_SAVES
200#define CONFIG_CMD_MEMORY
201
202#ifndef CONFIG_DRIVER_TI_EMAC
203#undef CONFIG_CMD_NET
204#undef CONFIG_CMD_DHCP
205#undef CONFIG_CMD_MII
206#undef CONFIG_CMD_PING
207#endif
208
Ben Gardiner314305c2010-10-14 17:26:25 -0400209#ifdef CONFIG_USE_NAND
210#undef CONFIG_CMD_FLASH
211#undef CONFIG_CMD_IMLS
212#define CONFIG_CMD_NAND
Ben Gardinera0a9c712010-10-14 17:26:27 -0400213
214#define CONFIG_CMD_MTDPARTS
215#define CONFIG_MTD_DEVICE
216#define CONFIG_MTD_PARTITIONS
217#define CONFIG_LZO
218#define CONFIG_RBTREE
219#define CONFIG_CMD_UBI
220#define CONFIG_CMD_UBIFS
Ben Gardiner314305c2010-10-14 17:26:25 -0400221#endif
222
Stefano Babicfc850ab2010-11-11 15:38:02 +0100223#ifdef CONFIG_USE_SPIFLASH
224#undef CONFIG_CMD_IMLS
225#undef CONFIG_CMD_FLASH
226#define CONFIG_CMD_SPI
227#define CONFIG_CMD_SF
228#define CONFIG_CMD_SAVEENV
229#endif
230
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530231#if !defined(CONFIG_USE_NAND) && \
232 !defined(CONFIG_USE_NOR) && \
233 !defined(CONFIG_USE_SPIFLASH)
234#define CONFIG_ENV_IS_NOWHERE
235#define CONFIG_SYS_NO_FLASH
236#define CONFIG_ENV_SIZE (16 << 10)
237#undef CONFIG_CMD_IMLS
238#undef CONFIG_CMD_ENV
239#endif
240
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200241/* additions for new relocation code, must added to all boards */
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200242#define CONFIG_SYS_SDRAM_BASE 0xc0000000
243#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
Wolfgang Denk0191e472010-10-26 14:34:52 +0200244 GENERATED_GBL_DATA_SIZE)
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530245#endif /* __CONFIG_H */