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git01.mediatek.com / filogic / uboot / 5b0b04064cbf380fc98020027a77a9266e9d0a71 / . / configs / peach-pi_defconfig
blob: 2664178cca0bb00259713861c645ea6098507531 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_EXYNOS=y
Thomas Abrahama99ad392016-04-23 22:18:12 +0530[diff] [blame]3CONFIG_ARCH_EXYNOS5=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_TARGET_PEACH_PI=y
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +0530[diff] [blame]5CONFIG_IDENT_STRING=" for Peach-Pi"
Akshay Saraswat62c2f9f2014-11-13 22:38:17 +0530[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
Tom Rini8db91cf2016-11-29 09:14:57 -0500[diff] [blame]7CONFIG_DISTRO_DEFAULTS=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]8CONFIG_FIT=y
9CONFIG_FIT_BEST_MATCH=y
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]10CONFIG_SILENT_CONSOLE=y
Simon Glassffe19762016-09-12 23:18:22 -0600[diff] [blame]11CONFIG_SPL=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]12CONFIG_SYS_PROMPT="Peach-Pi # "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]13# CONFIG_CMD_IMLS is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]14CONFIG_CMD_GPIO=y
15CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]16CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]17CONFIG_CMD_SF=y
18CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]19CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]22CONFIG_CMD_TIME=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]23CONFIG_CMD_PMIC=y
24CONFIG_CMD_REGULATOR=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]25CONFIG_CMD_TPM=y
Simon Glass81ab5472015-08-22 18:31:43 -0600[diff] [blame]26CONFIG_CMD_TPM_TEST=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]27CONFIG_CMD_EXT4_WRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame^]28CONFIG_ENV_IS_IN_SPI_FLASH=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]29CONFIG_DM_I2C_COMPAT=y
Simon Glass9ad07af2015-08-03 08:19:23 -0600[diff] [blame]30CONFIG_I2C_CROS_EC_TUNNEL=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]31CONFIG_I2C_MUX=y
32CONFIG_I2C_ARB_GPIO_CHALLENGE=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]33CONFIG_CROS_EC_KEYB=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]34CONFIG_CROS_EC=y
35CONFIG_CROS_EC_SPI=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]36CONFIG_MMC_DW=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]37CONFIG_MMC_SDHCI=y
Masahiro Yamada124f6ce2016-12-07 22:10:29 +0900[diff] [blame]38CONFIG_MMC_SDHCI_S5P=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]39CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]40CONFIG_SPI_FLASH_GIGADEVICE=y
41CONFIG_SPI_FLASH_WINBOND=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]42CONFIG_DM_PMIC=y
43CONFIG_PMIC_TPS65090=y
44CONFIG_DM_REGULATOR=y
45CONFIG_REGULATOR_TPS65090=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]46CONFIG_DM_PWM=y
47CONFIG_PWM_EXYNOS=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]48CONFIG_SOUND=y
49CONFIG_I2S=y
50CONFIG_I2S_SAMSUNG=y
51CONFIG_SOUND_MAX98095=y
52CONFIG_SOUND_WM8994=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]53CONFIG_EXYNOS_SPI=y
Christophe Ricard8759ff82015-10-06 22:54:41 +0200[diff] [blame]54CONFIG_TPM_TIS_INFINEON=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]55CONFIG_USB=y
56CONFIG_DM_USB=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]57CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]58CONFIG_USB_XHCI_DWC3=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]59CONFIG_USB_STORAGE=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]60CONFIG_DM_VIDEO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]61CONFIG_VIDCONSOLE_AS_LCD=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]62CONFIG_DISPLAY=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]63CONFIG_VIDEO_BRIDGE=y
64CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]65CONFIG_LCD=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]66CONFIG_TPM=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]67CONFIG_ERRNO_STR=y