| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Marvell Semiconductor <www.marvell.com> |
| 4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 5 | * |
| 6 | * Header file for Feroceon CPU core 88FR131 Based KW88F6192 SOC. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 24 | * MA 02110-1301 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef _CONFIG_KW88F6192_H |
| 28 | #define _CONFIG_KW88F6192_H |
| 29 | |
| 30 | /* SOC specific definations */ |
| 31 | #define KW88F6192_REGS_PHYS_BASE 0xf1000000 |
| 32 | #define KW_REGS_PHY_BASE KW88F6192_REGS_PHYS_BASE |
| 33 | |
| 34 | /* TCLK Core Clock defination */ |
| 35 | #define CONFIG_SYS_TCLK 166000000 /* 166MHz */ |
| 36 | |
| 37 | #endif /* _CONFIG_KW88F6192_H */ |