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Lokesh Vutlab50abe22018-11-02 19:51:09 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Nishanth Menoneaa39c62023-11-01 15:56:03 -05003 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutlab50abe22018-11-02 19:51:09 +05304 */
5
6/dts-v1/;
7
8#include "k3-am654.dtsi"
James Doublesine88e4722019-10-07 14:04:25 +05309#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
Lokesh Vutlab50abe22018-11-02 19:51:09 +053010#include "k3-am654-ddr.dtsi"
11
12/ {
13 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 R5 Base Board";
15
16 aliases {
17 serial0 = &wkup_uart0;
Andreas Dannenberg70734362019-08-15 15:55:30 -050018 serial1 = &mcu_uart0;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053019 serial2 = &main_uart0;
20 };
21
22 chosen {
23 stdout-path = "serial2:115200n8";
24 tick-timer = &timer1;
25 };
26
27 aliases {
28 remoteproc0 = &sysctrler;
29 remoteproc1 = &a53_0;
30 };
31
32 a53_0: a53@0 {
33 compatible = "ti,am654-rproc";
34 reg = <0x0 0x00a90000 0x0 0x10>;
Lokesh Vutla61ff6a32019-06-07 19:24:47 +053035 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
36 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053037 resets = <&k3_reset 202 0>;
Nishanth Menon975b78c2021-01-06 13:20:31 -060038 clocks = <&k3_clks 61 0>;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053039 assigned-clocks = <&k3_clks 202 0>;
40 assigned-clock-rates = <800000000>;
41 ti,sci = <&dmsc>;
42 ti,sci-proc-id = <32>;
43 ti,sci-host-id = <10>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070044 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053045 };
46
47 vtt_supply: vtt_supply {
48 compatible = "regulator-gpio";
49 regulator-name = "vtt";
50 regulator-min-microvolt = <0>;
51 regulator-max-microvolt = <3300000>;
52 gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
53 states = <0 0x0 3300000 0x1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070054 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053055 };
56};
57
58&cbass_main {
59 timer1: timer@40400000 {
60 compatible = "ti,omap5430-timer";
61 reg = <0x0 0x40400000 0x0 0x80>;
62 ti,timer-alwon;
63 clock-frequency = <25000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070064 bootph-all;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053065 };
66};
67
68&cbass_mcu {
69 mcu_secproxy: secproxy@28380000 {
70 compatible = "ti,am654-secure-proxy";
71 reg = <0x0 0x2a380000 0x0 0x80000>,
72 <0x0 0x2a400000 0x0 0x80000>,
73 <0x0 0x2a480000 0x0 0x80000>;
74 reg-names = "rt", "scfg", "target_data";
75 #mbox-cells = <1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070076 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053077 };
78};
79
Lokesh Vutla462275c2021-02-01 11:26:39 +053080&wkup_gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070081 bootph-pre-ram;
Lokesh Vutla462275c2021-02-01 11:26:39 +053082};
83
Lokesh Vutlab50abe22018-11-02 19:51:09 +053084&cbass_wakeup {
85 sysctrler: sysctrler {
86 compatible = "ti,am654-system-controller";
87 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
88 mbox-names = "tx", "rx";
Simon Glassd3a98cb2023-02-13 08:56:33 -070089 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +053090 };
91
Faiz Abbasd8fb3092019-06-11 00:43:31 +053092 clk_200mhz: dummy_clock {
93 compatible = "fixed-clock";
94 #clock-cells = <0>;
95 clock-frequency = <200000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070096 bootph-pre-ram;
Faiz Abbasd8fb3092019-06-11 00:43:31 +053097 };
Lokesh Vutlab50abe22018-11-02 19:51:09 +053098};
99
100&dmsc {
Andreas Dannenberg2d2777d2019-04-25 12:27:02 -0500101 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530102 mbox-names = "tx", "rx", "notify";
103 ti,host-id = <4>;
104 ti,secure-host;
105};
106
107&wkup_uart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700108 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530109 pinctrl-names = "default";
110 pinctrl-0 = <&wkup_uart0_pins_default>;
111 status = "okay";
112};
113
Andreas Dannenberg70734362019-08-15 15:55:30 -0500114&mcu_uart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700115 bootph-pre-ram;
Andreas Dannenberg70734362019-08-15 15:55:30 -0500116 pinctrl-names = "default";
117 pinctrl-0 = <&mcu_uart0_pins_default>;
118 clock-frequency = <48000000>;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530119 /delete-property/ power-domains;
Andreas Dannenberg70734362019-08-15 15:55:30 -0500120 status = "okay";
121};
122
Lokesh Vutla61ff6a32019-06-07 19:24:47 +0530123&main_uart0 {
Lokesh Vutla462275c2021-02-01 11:26:39 +0530124 pinctrl-names = "default";
125 pinctrl-0 = <&main_uart0_pins_default>;
Lokesh Vutla61ff6a32019-06-07 19:24:47 +0530126 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530127 status = "okay";
Lokesh Vutla61ff6a32019-06-07 19:24:47 +0530128};
129
Tero Kristo22193902019-10-24 15:00:57 +0530130&wkup_vtm0 {
Lokesh Vutla462275c2021-02-01 11:26:39 +0530131 compatible = "ti,am654-vtm", "ti,am654-avs";
Tero Kristo22193902019-10-24 15:00:57 +0530132 vdd-supply-3 = <&vdd_mpu>;
133 vdd-supply-4 = <&vdd_mpu>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700134 bootph-pre-ram;
Tero Kristo22193902019-10-24 15:00:57 +0530135};
136
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530137&wkup_pmx0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700138 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530139 wkup_uart0_pins_default: wkup_uart0_pins_default {
140 pinctrl-single,pins = <
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -0500141 AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
142 AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
143 AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
144 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530145 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700146 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530147 };
148
149 wkup_vtt_pins_default: wkup_vtt_pins_default {
150 pinctrl-single,pins = <
Andreas Dannenbergbfdf4982019-04-29 12:56:44 -0500151 AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530152 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700153 bootph-pre-ram;
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530154 };
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -0500155
Andreas Dannenberg70734362019-08-15 15:55:30 -0500156 mcu_uart0_pins_default: mcu_uart0_pins_default {
157 pinctrl-single,pins = <
158 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
159 AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
160 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
161 AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
162 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700163 bootph-pre-ram;
Andreas Dannenberg70734362019-08-15 15:55:30 -0500164 };
165
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -0500166 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
167 pinctrl-single,pins = <
168 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
169 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
170 >;
171 };
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +0530172
173 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
174 pinctrl-single,pins = <
175 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
176 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
177 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
178 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
179 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
180 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
181 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
182 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
183 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
184 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
185 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
186 >;
187 };
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530188};
189
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530190&main_pmx0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700191 bootph-pre-ram;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530192 main_uart0_pins_default: main-uart0-pins-default {
193 pinctrl-single,pins = <
194 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
195 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
196 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
197 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
198 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700199 bootph-pre-ram;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530200 };
201
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530202 main_mmc0_pins_default: main_mmc0_pins_default {
203 pinctrl-single,pins = <
204 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
205 AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
206 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
207 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
208 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
209 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
210 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
211 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
212 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
213 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
214 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
215 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700216 bootph-pre-ram;
Faiz Abbas43f69202021-02-04 15:10:56 +0530217 };
218
219 main_mmc1_pins_default: main_mmc1_pins_default {
220 pinctrl-single,pins = <
221 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
222 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
223 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
224 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
225 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
226 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
227 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
228 AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
229 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700230 bootph-pre-ram;
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530231 };
232};
233
Lokesh Vutlab50abe22018-11-02 19:51:09 +0530234&memorycontroller {
235 vtt-supply = <&vtt_supply>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&wkup_vtt_pins_default>;
238};
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530239
240&sdhci0 {
241 clock-names = "clk_xin";
242 clocks = <&clk_200mhz>;
Faiz Abbas43f69202021-02-04 15:10:56 +0530243 pinctrl-0 = <&main_mmc0_pins_default>;
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530244 /delete-property/ power-domains;
245 ti,driver-strength-ohm = <50>;
246};
247
248&sdhci1 {
249 clock-names = "clk_xin";
250 clocks = <&clk_200mhz>;
Faiz Abbas43f69202021-02-04 15:10:56 +0530251 pinctrl-0 = <&main_mmc1_pins_default>;
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530252 /delete-property/ power-domains;
Faiz Abbasaa8d1b72019-06-11 00:43:36 +0530253 ti,driver-strength-ohm = <50>;
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530254};
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -0500255
256&wkup_i2c0 {
257 pinctrl-names = "default";
258 pinctrl-0 = <&wkup_i2c0_pins_default>;
259 clock-frequency = <400000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700260 bootph-pre-ram;
Tero Kristof66d6862019-10-24 15:00:56 +0530261
262 vdd_mpu: tps62363@60 {
263 compatible = "ti,tps62363";
264 reg = <0x60>;
265 regulator-name = "VDD_MPU";
266 regulator-min-microvolt = <500000>;
267 regulator-max-microvolt = <1770000>;
268 regulator-always-on;
269 regulator-boot-on;
270 ti,vsel0-state-high;
271 ti,vsel1-state-high;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700272 bootph-pre-ram;
Tero Kristof66d6862019-10-24 15:00:56 +0530273 };
Andreas Dannenbergd20cf7b2019-06-04 18:08:15 -0500274};
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +0530275
276&ospi0 {
277 pinctrl-names = "default";
278 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
279
280 reg = <0x0 0x47040000 0x0 0x100>,
281 <0x0 0x50000000 0x0 0x8000000>;
282
283 flash@0{
284 compatible = "jedec,spi-nor";
285 reg = <0x0>;
286 spi-tx-bus-width = <1>;
287 spi-rx-bus-width = <8>;
Vignesh Raghavendra032a8552020-04-02 18:59:12 +0530288 spi-max-frequency = <50000000>;
Vignesh Raghavendra1ee79552020-02-04 11:09:51 +0530289 cdns,tshsl-ns = <60>;
290 cdns,tsd2d-ns = <60>;
291 cdns,tchsh-ns = <60>;
292 cdns,tslch-ns = <60>;
293 cdns,read-delay = <0>;
294 #address-cells = <1>;
295 #size-cells = <1>;
296 };
297};
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530298
299&main_pmx0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700300 bootph-pre-ram;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530301 usb0_pins_default: usb0_pins_default {
302 pinctrl-single,pins = <
303 AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
304 >;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700305 bootph-pre-ram;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530306 };
307};
308
309&dwc3_0 {
310 status = "okay";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700311 bootph-pre-ram;
Aswath Govindraju57c687b2022-05-18 16:49:12 +0530312 /delete-property/ clocks;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530313 /delete-property/ power-domains;
314 /delete-property/ assigned-clocks;
315 /delete-property/ assigned-clock-parents;
316};
317
318&usb0_phy {
319 status = "okay";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700320 bootph-pre-ram;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530321 /delete-property/ clocks;
322};
323
324&usb0 {
325 pinctrl-names = "default";
326 pinctrl-0 = <&usb0_pins_default>;
327 dr_mode = "peripheral";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700328 bootph-pre-ram;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530329};
330
331&scm_conf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700332 bootph-pre-ram;
Faiz Abbas60a7ab22020-08-03 11:35:11 +0530333};