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Patrick Delaunay50599142018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay06020d82018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay06020d82018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay48c5e902020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay06020d82018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunay91be5942019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay06020d82018-03-12 10:46:17 +010014
15/ {
Patrick Delaunay50599142018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay06020d82018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Patrice Chotard00442d02019-02-12 16:50:38 +010020 stdout-path = "serial0:115200n8";
Patrick Delaunay06020d82018-03-12 10:46:17 +010021 };
22
Patrick Delaunay50599142018-07-09 15:17:19 +020023 memory@c0000000 {
Patrick Delaunaya3705302019-07-11 11:15:28 +020024 device_type = "memory";
Patrick Delaunay06020d82018-03-12 10:46:17 +010025 reg = <0xC0000000 0x40000000>;
26 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +020027
Patrick Delaunay708cae72019-07-30 19:16:12 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Patrick Delaunay8c6e6132019-11-06 16:16:33 +010033 mcuram2: mcuram2@10000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10000000 0x40000>;
36 no-map;
37 };
38
39 vdev0vring0: vdev0vring0@10040000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10040000 0x1000>;
42 no-map;
43 };
44
45 vdev0vring1: vdev0vring1@10041000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10041000 0x1000>;
48 no-map;
49 };
50
51 vdev0buffer: vdev0buffer@10042000 {
52 compatible = "shared-dma-pool";
53 reg = <0x10042000 0x4000>;
54 no-map;
55 };
56
57 mcuram: mcuram@30000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x30000000 0x40000>;
60 no-map;
61 };
62
63 retram: retram@38000000 {
64 compatible = "shared-dma-pool";
65 reg = <0x38000000 0x10000>;
66 no-map;
67 };
68
Patrick Delaunay708cae72019-07-30 19:16:12 +020069 gpu_reserved: gpu@e8000000 {
70 reg = <0xe8000000 0x8000000>;
71 no-map;
72 };
73 };
74
Patrice Chotard00442d02019-02-12 16:50:38 +010075 aliases {
76 serial0 = &uart4;
77 };
78
Patrice Chotardf6ef2292018-04-26 17:13:11 +020079 sd_switch: regulator-sd_switch {
80 compatible = "regulator-gpio";
81 regulator-name = "sd_switch";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <2900000>;
84 regulator-type = "voltage";
85 regulator-always-on;
86
87 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
88 gpios-states = <0>;
Patrick Delaunayb9c16b72020-01-28 10:11:00 +010089 states = <1800000 0x1>,
90 <2900000 0x0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +020091 };
Patrick Delaunay06020d82018-03-12 10:46:17 +010092};
93
Patrick Delaunay48c5e902020-03-06 17:54:41 +010094&adc {
95 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
96 pinctrl-0 = <&adc1_in6_pins_a>;
97 pinctrl-names = "default";
98 vdd-supply = <&vdd>;
99 vdda-supply = <&vdda>;
100 vref-supply = <&vdda>;
101 status = "disabled";
102 adc1: adc@0 {
103 st,adc-channels = <0 1 6>;
104 /* 16.5 ck_cycles sampling time */
105 st,min-sample-time-nsecs = <400>;
106 status = "okay";
107 };
108};
109
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100110&dac {
111 pinctrl-names = "default";
112 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
113 vref-supply = <&vdda>;
114 status = "disabled";
115 dac1: dac@1 {
116 status = "okay";
117 };
118 dac2: dac@2 {
119 status = "okay";
120 };
121};
122
Patrick Delaunaya3705302019-07-11 11:15:28 +0200123&dts {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100124 status = "okay";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100125};
126
Patrick Delaunay708cae72019-07-30 19:16:12 +0200127&gpu {
128 contiguous-area = <&gpu_reserved>;
129 status = "okay";
130};
131
Patrick Delaunay06020d82018-03-12 10:46:17 +0100132&i2c4 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200133 pinctrl-names = "default", "sleep";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100134 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200135 pinctrl-1 = <&i2c4_pins_sleep_a>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100136 i2c-scl-rising-time-ns = <185>;
137 i2c-scl-falling-time-ns = <20>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200138 clock-frequency = <400000>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100139 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200140 /* spare dmas for other usage */
141 /delete-property/dmas;
142 /delete-property/dma-names;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100143
Patrick Delaunaya3705302019-07-11 11:15:28 +0200144 pmic: stpmic@33 {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100145 compatible = "st,stpmic1";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100146 reg = <0x33>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200147 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100148 interrupt-controller;
149 #interrupt-cells = <2>;
150 status = "okay";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200151
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200152 regulators {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100153 compatible = "st,stpmic1-regulators";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200154 ldo1-supply = <&v3v3>;
155 ldo2-supply = <&v3v3>;
156 ldo3-supply = <&vdd_ddr>;
157 ldo5-supply = <&v3v3>;
158 ldo6-supply = <&v3v3>;
159 pwr_sw1-supply = <&bst_out>;
160 pwr_sw2-supply = <&bst_out>;
161
162 vddcore: buck1 {
163 regulator-name = "vddcore";
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100164 regulator-min-microvolt = <1200000>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200165 regulator-max-microvolt = <1350000>;
166 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200167 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200168 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200169 };
170
171 vdd_ddr: buck2 {
172 regulator-name = "vdd_ddr";
173 regulator-min-microvolt = <1350000>;
174 regulator-max-microvolt = <1350000>;
175 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200176 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200177 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200178 };
179
180 vdd: buck3 {
181 regulator-name = "vdd";
182 regulator-min-microvolt = <3300000>;
183 regulator-max-microvolt = <3300000>;
184 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200185 st,mask-reset;
186 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200187 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200188 };
189
190 v3v3: buck4 {
191 regulator-name = "v3v3";
192 regulator-min-microvolt = <3300000>;
193 regulator-max-microvolt = <3300000>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200194 regulator-always-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200195 regulator-over-current-protection;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200196 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200197 };
198
199 vdda: ldo1 {
200 regulator-name = "vdda";
201 regulator-min-microvolt = <2900000>;
202 regulator-max-microvolt = <2900000>;
203 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200204 };
205
206 v2v8: ldo2 {
207 regulator-name = "v2v8";
208 regulator-min-microvolt = <2800000>;
209 regulator-max-microvolt = <2800000>;
210 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200211 };
212
213 vtt_ddr: ldo3 {
214 regulator-name = "vtt_ddr";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200215 regulator-min-microvolt = <500000>;
216 regulator-max-microvolt = <750000>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200217 regulator-always-on;
218 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200219 };
220
221 vdd_usb: ldo4 {
222 regulator-name = "vdd_usb";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200223 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200224 };
225
226 vdd_sd: ldo5 {
227 regulator-name = "vdd_sd";
228 regulator-min-microvolt = <2900000>;
229 regulator-max-microvolt = <2900000>;
230 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200231 regulator-boot-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200232 };
233
234 v1v8: ldo6 {
235 regulator-name = "v1v8";
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <1800000>;
238 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200239 };
240
241 vref_ddr: vref_ddr {
242 regulator-name = "vref_ddr";
243 regulator-always-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200244 };
245
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100246 bst_out: boost {
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200247 regulator-name = "bst_out";
248 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100249 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200250
251 vbus_otg: pwr_sw1 {
252 regulator-name = "vbus_otg";
253 interrupts = <IT_OCP_OTG 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200254 };
255
256 vbus_sw: pwr_sw2 {
257 regulator-name = "vbus_sw";
258 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100259 regulator-active-discharge = <1>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200260 };
261 };
Patrick Delaunaya3705302019-07-11 11:15:28 +0200262
263 onkey {
264 compatible = "st,stpmic1-onkey";
265 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
266 interrupt-names = "onkey-falling", "onkey-rising";
267 power-off-time-sec = <10>;
268 status = "okay";
269 };
270
271 watchdog {
272 compatible = "st,stpmic1-wdt";
273 status = "disabled";
274 };
Patrick Delaunay06020d82018-03-12 10:46:17 +0100275 };
276};
277
Fabien Dessennec2a97d32019-05-14 11:20:37 +0200278&ipcc {
279 status = "okay";
280};
281
Patrice Chotard00442d02019-02-12 16:50:38 +0100282&iwdg2 {
283 timeout-sec = <32>;
284 status = "okay";
285};
286
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200287&m4_rproc {
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100288 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
289 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200290 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
291 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100292 interrupt-parent = <&exti>;
293 interrupts = <68 1>;
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200294 status = "okay";
295};
296
Patrick Delaunay900494d2020-01-28 10:10:59 +0100297&pwr_regulators {
298 vdd-supply = <&vdd>;
299 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200300};
301
Patrice Chotard00442d02019-02-12 16:50:38 +0100302&rng1 {
303 status = "okay";
304};
305
306&rtc {
307 status = "okay";
308};
309
Patrick Delaunay06020d82018-03-12 10:46:17 +0100310&sdmmc1 {
Patrick Delaunaya3705302019-07-11 11:15:28 +0200311 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100312 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200313 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
314 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200315 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
316 disable-wp;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100317 st,sig-dir;
318 st,neg-edge;
319 st,use-ckin;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100320 bus-width = <4>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200321 vmmc-supply = <&vdd_sd>;
322 vqmmc-supply = <&sd_switch>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100323 status = "okay";
324};
325
Patrick Delaunay8d050102018-03-20 10:54:52 +0100326&sdmmc2 {
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100327 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay8d050102018-03-20 10:54:52 +0100328 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100329 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
330 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100331 non-removable;
332 no-sd;
333 no-sdio;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100334 st,neg-edge;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100335 bus-width = <8>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200336 vmmc-supply = <&v3v3>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200337 vqmmc-supply = <&vdd>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100338 mmc-ddr-3_3v;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100339 status = "okay";
340};
341
Patrice Chotard00442d02019-02-12 16:50:38 +0100342&timers6 {
343 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200344 /* spare dmas for other usage */
345 /delete-property/dmas;
346 /delete-property/dma-names;
Patrice Chotard00442d02019-02-12 16:50:38 +0100347 timer@5 {
348 status = "okay";
349 };
350};
351
Patrick Delaunay06020d82018-03-12 10:46:17 +0100352&uart4 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&uart4_pins_a>;
355 status = "okay";
356};
Patrick Delaunay50599142018-07-09 15:17:19 +0200357
Patrick Delaunaya3705302019-07-11 11:15:28 +0200358&usbotg_hs {
359 vbus-supply = <&vbus_otg>;
360};
361
Patrick Delaunay50599142018-07-09 15:17:19 +0200362&usbphyc_port0 {
363 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200364};
365
366&usbphyc_port1 {
367 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200368};