Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Marvell DB-{88F6281,88F6282}-BP Development Board Setup |
| 4 | * |
| 5 | * Saeed Bishara <saeed@marvell.com> |
| 6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 7 | * |
| 8 | * This file contains the definitions that are common between the 6281 |
| 9 | * and 6282 variants of the Marvell Kirkwood Development Board. |
| 10 | */ |
| 11 | |
| 12 | #include "kirkwood.dtsi" |
| 13 | |
| 14 | / { |
| 15 | memory { |
| 16 | device_type = "memory"; |
| 17 | reg = <0x00000000 0x20000000>; /* 512 MB */ |
| 18 | }; |
| 19 | |
| 20 | chosen { |
| 21 | bootargs = "console=ttyS0,115200n8 earlyprintk"; |
| 22 | stdout-path = &uart0; |
| 23 | }; |
| 24 | |
| 25 | aliases { |
| 26 | ethernet0 = ð0; |
| 27 | spi0 = &spi0; |
| 28 | }; |
| 29 | |
| 30 | ocp@f1000000 { |
| 31 | pin-controller@10000 { |
| 32 | pmx_sdio_gpios: pmx-sdio-gpios { |
| 33 | marvell,pins = "mpp37", "mpp38"; |
| 34 | marvell,function = "gpio"; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | serial@12000 { |
| 39 | status = "okay"; |
| 40 | }; |
| 41 | |
| 42 | sata@80000 { |
| 43 | nr-ports = <2>; |
| 44 | status = "okay"; |
| 45 | }; |
| 46 | |
| 47 | ehci@50000 { |
| 48 | status = "okay"; |
| 49 | }; |
| 50 | |
| 51 | mvsdio@90000 { |
| 52 | pinctrl-0 = <&pmx_sdio_gpios>; |
| 53 | pinctrl-names = "default"; |
| 54 | wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
| 55 | cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
| 56 | status = "okay"; |
| 57 | }; |
| 58 | }; |
| 59 | }; |
| 60 | |
| 61 | &nand { |
| 62 | chip-delay = <25>; |
| 63 | status = "okay"; |
| 64 | |
| 65 | partition@0 { |
| 66 | label = "uboot"; |
| 67 | reg = <0x0 0x100000>; |
| 68 | }; |
| 69 | |
| 70 | partition@100000 { |
| 71 | label = "uImage"; |
| 72 | reg = <0x100000 0x400000>; |
| 73 | }; |
| 74 | |
| 75 | partition@500000 { |
| 76 | label = "root"; |
| 77 | reg = <0x500000 0x1fb00000>; |
| 78 | }; |
| 79 | }; |
| 80 | |
| 81 | &mdio { |
| 82 | status = "okay"; |
| 83 | |
| 84 | ethphy0: ethernet-phy@8 { |
| 85 | reg = <8>; |
| 86 | }; |
| 87 | }; |
| 88 | |
| 89 | ð0 { |
| 90 | status = "okay"; |
| 91 | ethernet0-port@0 { |
| 92 | phy-handle = <ðphy0>; |
| 93 | }; |
| 94 | }; |