blob: c108736811578f4a665873b12327807ff7b8df6b [file] [log] [blame]
Icenowy Zhengb198c2e2022-01-29 10:23:02 -05001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2018
4 * Icenowy Zheng <icenowy@aosc.io>
5 *
6 * Based on arch/arm/cpu/armv7/sunxi/u-boot-spl.lds:
7 */
8MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
9 LENGTH = CONFIG_SPL_MAX_SIZE }
10MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
11 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
12
13OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
14OUTPUT_ARCH(arm)
15ENTRY(_start)
16SECTIONS
17{
18 .text :
19 {
20 __start = .;
21 *(.vectors)
22 *(.text*)
23 } > .sram
24
25 . = ALIGN(4);
26 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
27
28 . = ALIGN(4);
29 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
30
31 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +000032 __u_boot_list : {
33 KEEP(*(SORT(__u_boot_list*)));
Icenowy Zhengb198c2e2022-01-29 10:23:02 -050034 } > .sram
35
36 . = ALIGN(4);
37 __image_copy_end = .;
38 _end = .;
39
40 .bss :
41 {
42 . = ALIGN(4);
43 __bss_start = .;
44 *(.bss*)
45 . = ALIGN(4);
46 __bss_end = .;
47 } > .sdram
48}