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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher3757e972013-12-02 07:47:23 +01002/*
3 * Common board functions for siemens AT91SAM9G45 based boards
4 * (C) Copyright 2013 Siemens AG
5 *
6 * Based on:
7 * U-Boot file: include/configs/at91sam9m10g45ek.h
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schocher3757e972013-12-02 07:47:23 +010011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/hardware.h>
Heiko Schocher8189a082015-08-21 11:28:19 +020017#include <linux/sizes.h>
Heiko Schocher3757e972013-12-02 07:47:23 +010018
Heiko Schocher3757e972013-12-02 07:47:23 +010019/*
20 * Warning: changing CONFIG_SYS_TEXT_BASE requires
21 * adapting the initial boot program.
22 * Since the linker has to swallow that define, we must use a pure
23 * hex number here!
24 */
25
Heiko Schocher3757e972013-12-02 07:47:23 +010026#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
27
28/* ARM asynchronous clock */
29#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
30#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Heiko Schocher3757e972013-12-02 07:47:23 +010031
Heiko Schocher3757e972013-12-02 07:47:23 +010032/* general purpose I/O */
33#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Heiko Schocher3757e972013-12-02 07:47:23 +010034#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
35
36/* serial console */
Heiko Schocher3757e972013-12-02 07:47:23 +010037#define CONFIG_USART_BASE ATMEL_BASE_DBGU
38#define CONFIG_USART_ID ATMEL_ID_SYS
39
40/* LED */
41#define CONFIG_AT91_LED
42#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
43#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
44
Heiko Schocher3757e972013-12-02 07:47:23 +010045
46/*
47 * BOOTP options
48 */
49#define CONFIG_BOOTP_BOOTFILESIZE
Heiko Schocher3757e972013-12-02 07:47:23 +010050
Heiko Schocher3757e972013-12-02 07:47:23 +010051/* SDRAM */
Heiko Schocher3757e972013-12-02 07:47:23 +010052#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
53#define CONFIG_SYS_SDRAM_SIZE 0x08000000
54
55#define CONFIG_SYS_INIT_SP_ADDR \
Heiko Schocher938a3352017-06-22 07:42:50 +020056 (CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE)
Heiko Schocher3757e972013-12-02 07:47:23 +010057
Heiko Schocher3757e972013-12-02 07:47:23 +010058/* NAND flash */
59#ifdef CONFIG_CMD_NAND
Heiko Schocher3757e972013-12-02 07:47:23 +010060#define CONFIG_SYS_MAX_NAND_DEVICE 1
61#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
62#define CONFIG_SYS_NAND_DBW_8
63/* our ALE is AD21 */
64#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
65/* our CLE is AD22 */
66#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
67#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
Heiko Schocher22ab1322014-11-18 11:53:53 +010068#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
Heiko Schocher3757e972013-12-02 07:47:23 +010069#endif
70
71/* Ethernet */
Heiko Schocher3757e972013-12-02 07:47:23 +010072#define CONFIG_RMII
73#define CONFIG_NET_RETRY_COUNT 20
74#define CONFIG_AT91_WANTS_COMMON_PHY
75
Heiko Schocher08c5df22015-08-21 11:28:20 +020076/* DFU class support */
Heiko Schocher08c5df22015-08-21 11:28:20 +020077#define DFU_MANIFEST_POLL_TIMEOUT 25000
78
Heiko Schocher3757e972013-12-02 07:47:23 +010079/* bootstrap + u-boot + env in nandflash */
Heiko Schocher3757e972013-12-02 07:47:23 +010080
Heiko Schocher25d74a32014-10-31 08:31:06 +010081/* Defines for SPL */
Heiko Schocher8189a082015-08-21 11:28:19 +020082#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
83#define CONFIG_SPL_STACK (SZ_16K)
Heiko Schocher25d74a32014-10-31 08:31:06 +010084
85#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
Heiko Schocher8189a082015-08-21 11:28:19 +020086#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
Heiko Schocher25d74a32014-10-31 08:31:06 +010087
Heiko Schocher25d74a32014-10-31 08:31:06 +010088#define CONFIG_SPL_NAND_RAW_ONLY
89#define CONFIG_SPL_NAND_SOFTECC
Heiko Schocher25d74a32014-10-31 08:31:06 +010090#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
91#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
92#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
Heiko Schocher25d74a32014-10-31 08:31:06 +010093
Heiko Schocher25d74a32014-10-31 08:31:06 +010094#define CONFIG_SYS_NAND_ECCSIZE 256
95#define CONFIG_SYS_NAND_ECCBYTES 3
Heiko Schocher25d74a32014-10-31 08:31:06 +010096#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
97 48, 49, 50, 51, 52, 53, 54, 55, \
98 56, 57, 58, 59, 60, 61, 62, 63, }
99
100#define CONFIG_SPL_ATMEL_SIZE
101#define CONFIG_SYS_MASTER_CLOCK 132096000
102#define AT91_PLL_LOCK_TIMEOUT 1000000
103#define CONFIG_SYS_AT91_PLLA 0x20c73f03
104#define CONFIG_SYS_MCKR 0x1301
105#define CONFIG_SYS_MCKR_CSS 0x1302
106
Stefan Roese67bcbef2019-04-02 10:57:25 +0200107#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
108#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
109
Heiko Schocher3757e972013-12-02 07:47:23 +0100110#endif