Blame - arch/x86/cpu/u-boot.lds - filogic/uboot

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Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	1	/*
				2	* (C) Copyright 2002
Albert ARIBAUD	60fbc8d	2011-08-04 18:45:45 +0200	[diff] [blame]	3	* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	4	*
Wolfgang Denk	d79de1d	2013-07-08 09:37:19 +0200	[diff] [blame]	5	* SPDX-License-Identifier: GPL-2.0+
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	6	*/
				7
Graeme Russ	c5881f1	2011-04-13 19:43:25 +1000	[diff] [blame]	8	#include <config.h>
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	9	OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
				10	OUTPUT_ARCH(i386)
				11	ENTRY(_start)
				12
				13	SECTIONS
				14	{
Wolfgang Denk	fb2759c	2010-10-18 23:43:37 +0200	[diff] [blame]	15	. = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
Graeme Russ	ae428db	2010-10-07 20:03:31 +1100	[diff] [blame]	16	__text_start = .;
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	17	.text : { (.text); }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	18
				19	. = ALIGN(4);
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	20
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	21	. = ALIGN(4);
Marek Vasut	607092a	2012-10-12 10:27:03 +0000	[diff] [blame]	22	.u_boot_list : {
Albert ARIBAUD	c24895e	2013-02-25 00:59:00 +0000	[diff] [blame]	23	KEEP((SORT(.u_boot_list)));
Marek Vasut	607092a	2012-10-12 10:27:03 +0000	[diff] [blame]	24	}
				25
				26	. = ALIGN(4);
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	27	.rodata : { (SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) }
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	28
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	29	. = ALIGN(4);
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	30	.data : { (.data) }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	31
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	32	. = ALIGN(4);
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	33	.hash : { (.hash) }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	34
				35	. = ALIGN(4);
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	36	.got : { (.got) }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	37
				38	. = ALIGN(4);
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	39	__data_end = .;
Simon Glass	3e93e33	2013-03-05 14:39:54 +0000	[diff] [blame]	40	__init_end = .;
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	41
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	42	. = ALIGN(4);
Simon Glass	18cc2bc	2013-02-28 19:26:14 +0000	[diff] [blame]	43	.dynsym : { (.dynsym) }
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	44
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	45	. = ALIGN(4);
Graeme Russ	ae428db	2010-10-07 20:03:31 +1100	[diff] [blame]	46	__rel_dyn_start = .;
Graeme Russ	078395c	2009-11-24 20:04:21 +1100	[diff] [blame]	47	.rel.dyn : { *(.rel.dyn) }
Graeme Russ	ae428db	2010-10-07 20:03:31 +1100	[diff] [blame]	48	__rel_dyn_end = .;
Simon Glass	781db8c	2013-02-28 19:26:13 +0000	[diff] [blame]	49	. = ALIGN(4);
				50	_end = .;
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	51
Simon Glass	18cc2bc	2013-02-28 19:26:14 +0000	[diff] [blame]	52	.bss __rel_dyn_start (OVERLAY) : {
				53	__bss_start = .;
				54	*(.bss)
				55	(COM)
				56	. = ALIGN(4);
				57	__bss_end = .;
				58	}
				59
Graeme Russ	fb4e2be	2010-10-07 20:03:32 +1100	[diff] [blame]	60	/DISCARD/ : { (.dynstr) }
				61	/DISCARD/ : { (.dynamic) }
				62	/DISCARD/ : { (.plt) }
				63	/DISCARD/ : { (.interp) }
				64	/DISCARD/ : { (.gnu) }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	65
Simon Glass	bfb5980	2013-02-14 04:18:54 +0000	[diff] [blame]	66	#ifdef CONFIG_X86_RESET_VECTOR
Gabe Black	14f8246	2012-11-27 21:08:06 +0000	[diff] [blame]	67
Graeme Russ	3fe4860	2011-02-12 15:11:24 +1100	[diff] [blame]	68	/*
				69	* The following expressions place the 16-bit Real-Mode code and
				70	* Reset Vector at the end of the Flash ROM
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	71	*/
Graeme Russ	3fe4860	2011-02-12 15:11:24 +1100	[diff] [blame]	72	. = START_16;
Graeme Russ	c5881f1	2011-04-13 19:43:25 +1000	[diff] [blame]	73	.start16 : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE + START_16)) { KEEP(*(.start16)); }
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	74
Graeme Russ	3fe4860	2011-02-12 15:11:24 +1100	[diff] [blame]	75	. = RESET_VEC_LOC;
Graeme Russ	c5881f1	2011-04-13 19:43:25 +1000	[diff] [blame]	76	.resetvec : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE + RESET_VEC_LOC)) { KEEP(*(.resetvec)); }
Gabe Black	14f8246	2012-11-27 21:08:06 +0000	[diff] [blame]	77	#endif
Graeme Russ	e56d397	2008-12-07 10:28:57 +1100	[diff] [blame]	78	}