blob: 8d78029a9652bc30e8207de92f2f63d94e592951 [file] [log] [blame]
Ian Campbell2f1afcc2014-05-05 11:52:25 +01001/*
2 * (C) Copyright 2007-2012
3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
4 * Berg Xing <bergxing@allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
6 *
7 * Sunxi platform dram register definition.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef _SUNXI_DRAM_H
13#define _SUNXI_DRAM_H
14
Hans de Goede36b25702014-12-08 13:38:21 +010015#include <asm/io.h>
Ian Campbell2f1afcc2014-05-05 11:52:25 +010016#include <linux/types.h>
17
Hans de Goede5037c452014-11-02 20:31:16 +010018/* dram regs definition */
Hans de Goede31521222014-10-25 20:27:23 +020019#if defined(CONFIG_MACH_SUN6I)
20#include <asm/arch/dram_sun6i.h>
Hans de Goede966d2392014-12-07 14:34:27 +010021#elif defined(CONFIG_MACH_SUN8I)
22#include <asm/arch/dram_sun8i.h>
Hans de Goede31521222014-10-25 20:27:23 +020023#else
Hans de Goede5037c452014-11-02 20:31:16 +010024#include <asm/arch/dram_sun4i.h>
Hans de Goede31521222014-10-25 20:27:23 +020025#endif
Ian Campbell2f1afcc2014-05-05 11:52:25 +010026
Hans de Goedeb29de012014-12-08 13:58:53 +010027#define MCTL_MEM_FILL_MATCH_COUNT 64
28
Ian Campbell2f1afcc2014-05-05 11:52:25 +010029unsigned long sunxi_dram_init(void);
Ian Campbell2f1afcc2014-05-05 11:52:25 +010030
Hans de Goede36b25702014-12-08 13:38:21 +010031/*
32 * Wait up to 1s for value to be set in given part of reg.
33 */
34static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val)
35{
36 unsigned long tmo = timer_get_us() + 1000000;
37
38 while ((readl(reg) & mask) != val) {
39 if (timer_get_us() > tmo)
40 panic("Timeout initialising DRAM\n");
41 }
42}
43
Hans de Goedeb29de012014-12-08 13:58:53 +010044/*
45 * Fill beginning of DRAM with "random" data for mctl_mem_matches()
46 */
47static inline void mctl_mem_fill(void)
48{
49 int i;
50
51 for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++)
52 writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
53}
54
55/*
56 * Test if memory at offset offset matches memory at begin of DRAM
57 */
58static inline bool mctl_mem_matches(u32 offset)
59{
Hans de Goede41dea712014-12-08 14:17:08 +010060 return memcmp((u32 *)CONFIG_SYS_SDRAM_BASE,
61 (u32 *)(CONFIG_SYS_SDRAM_BASE + offset),
62 MCTL_MEM_FILL_MATCH_COUNT * 4) == 0;
Hans de Goedeb29de012014-12-08 13:58:53 +010063}
64
Ian Campbell2f1afcc2014-05-05 11:52:25 +010065#endif /* _SUNXI_DRAM_H */