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Ian Campbell2f1afcc2014-05-05 11:52:25 +01001/*
2 * (C) Copyright 2007-2012
3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
4 * Berg Xing <bergxing@allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
6 *
7 * Sunxi platform dram register definition.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef _SUNXI_DRAM_H
13#define _SUNXI_DRAM_H
14
Hans de Goede36b25702014-12-08 13:38:21 +010015#include <asm/io.h>
Ian Campbell2f1afcc2014-05-05 11:52:25 +010016#include <linux/types.h>
17
Hans de Goede5037c452014-11-02 20:31:16 +010018/* dram regs definition */
Hans de Goede31521222014-10-25 20:27:23 +020019#if defined(CONFIG_MACH_SUN6I)
20#include <asm/arch/dram_sun6i.h>
21#else
Hans de Goede5037c452014-11-02 20:31:16 +010022#include <asm/arch/dram_sun4i.h>
Hans de Goede31521222014-10-25 20:27:23 +020023#endif
Ian Campbell2f1afcc2014-05-05 11:52:25 +010024
25unsigned long sunxi_dram_init(void);
Ian Campbell2f1afcc2014-05-05 11:52:25 +010026
Hans de Goede36b25702014-12-08 13:38:21 +010027/*
28 * Wait up to 1s for value to be set in given part of reg.
29 */
30static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val)
31{
32 unsigned long tmo = timer_get_us() + 1000000;
33
34 while ((readl(reg) & mask) != val) {
35 if (timer_get_us() > tmo)
36 panic("Timeout initialising DRAM\n");
37 }
38}
39
Ian Campbell2f1afcc2014-05-05 11:52:25 +010040#endif /* _SUNXI_DRAM_H */