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git01.mediatek.com / filogic / uboot / 59d10d0d44a725fe7d65c713c2cb1570e281edaa / . / dts / upstream / src / arm / ti / omap / am335x-netcom-plus-8xx.dts
blob: 5a9fcec040fae17359a8042f7cf26005af385546 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/*
7 * VScom OnRISC
8 * http://www.vscom.de
9 */
10
11/dts-v1/;
12
13#include "am335x-baltos.dtsi"
14
15/ {
16 model = "NetCom Plus";
17};
18
19&am33xx_pinmux {
20 pinctrl-names = "default";
21 pinctrl-0 = <&dip_switches>;
22
23 dip_switches: dip-switches-pins {
24 pinctrl-single,pins = <
25 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
26 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
27 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
28 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
29 >;
30 };
31
32 tca6416_pins: tca6416-pins {
33 pinctrl-single,pins = <
34 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)
35 >;
36 };
37
38 i2c2_pins: i2c2-pins {
39 pinctrl-single,pins = <
40 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
41 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
42 >;
43 };
44};
45
46&usb0_phy {
47 status = "okay";
48};
49
50&usb1_phy {
51 status = "okay";
52};
53
54&usb0 {
55 status = "okay";
56 dr_mode = "host";
57};
58
59&usb1 {
60 status = "okay";
61 dr_mode = "host";
62};
63
64&i2c1 {
65 tca6416a: gpio@20 {
66 compatible = "ti,tca6416";
67 reg = <0x20>;
68 gpio-controller;
69 #gpio-cells = <2>;
70 interrupt-parent = <&gpio0>;
71 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&tca6416_pins>;
74 gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
75 "GP_IN4", "GP_IN5", "GP_IN6", "GP_IN7",
76 "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
77 "GP_OUT4", "GP_OUT5", "GP_OUT6", "GP_OUT7";
78 };
79};
80
81&i2c2 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&i2c2_pins>;
84
85 status = "okay";
86 clock-frequency = <400000>;
87
88 tca6416b: gpio@20 {
89 compatible = "ti,tca6416";
90 reg = <0x20>;
91 gpio-controller;
92 #gpio-cells = <2>;
93 gpio-line-names = "CH1_M0", "CH1_M1", "CH1_M2", "CH1_M3",
94 "CH2_M0", "CH2_M1", "CH2_M2", "CH2_M3",
95 "CH3_M0", "CH3_M1", "CH3_M2", "CH3_M3",
96 "CH4_M0", "CH4_M1", "CH4_M2", "CH4_M3";
97 };
98
99 tca6416c: gpio@21 {
100 compatible = "ti,tca6416";
101 reg = <0x21>;
102 gpio-controller;
103 #gpio-cells = <2>;
104 gpio-line-names = "CH5_M0", "CH5_M1", "CH5_M2", "CH5_M3",
105 "CH6_M0", "CH6_M1", "CH6_M2", "CH6_M3",
106 "CH7_M0", "CH7_M1", "CH7_M2", "CH7_M3",
107 "CH8_M0", "CH8_M1", "CH8_M2", "CH8_M3";
108 };
109};
110
111&davinci_mdio_sw {
112 phy0: ethernet-phy@0 {
113 reg = <1>;
114 };
115};
116
117&cpsw_port1 {
118 phy-mode = "rmii";
119 ti,dual-emac-pvid = <1>;
120 phy-handle = <&phy0>;
121};
122
123&cpsw_port2 {
124 phy-mode = "rgmii-id";
125 ti,dual-emac-pvid = <2>;
126 phy-handle = <&phy1>;
127};
128
129&gpio0 {
130 gpio-line-names =
131 "MDIO",
132 "MDC",
133 "NC",
134 "NC",
135 "I2C1_SDA",
136 "I2C1_SCL",
137 "NC",
138 "NC",
139 "NC",
140 "NC",
141 "NC",
142 "NC",
143 "I2C2_SDA",
144 "I2C2_SCL",
145 "NC",
146 "NC",
147 "onrisc:blue:wlan",
148 "onrisc:green:app",
149 "USB0_DRVVBUS",
150 "ETH2_INT",
151 "NC",
152 "NC",
153 "MMC1_DAT0",
154 "MMC1_DAT1",
155 "NC",
156 "NC",
157 "MMC1_DAT2",
158 "MMC1_DAT3",
159 "NC",
160 "NC",
161 "GPMC_WAIT0",
162 "GPMC_WP_N";
163};
164
165&gpio1 {
166 gpio-line-names =
167 "GPMC_AD0",
168 "GPMC_AD1",
169 "GPMC_AD2",
170 "GPMC_AD3",
171 "GPMC_AD4",
172 "GPMC_AD5",
173 "GPMC_AD6",
174 "GPMC_AD7",
175 "NC",
176 "NC",
177 "CONSOLE_RX",
178 "CONSOLE_TX",
179 "SW2_0_alt",
180 "SW2_1_alt",
181 "SW2_2_alt",
182 "SW2_3_alt",
183 "RGMII2_TCTL",
184 "RGMII2_RCTL",
185 "RGMII2_TD3",
186 "RGMII2_TD2",
187 "RGMII2_TD1",
188 "RGMII2_TD0",
189 "RGMII2_TCLK",
190 "RGMII2_RCLK",
191 "RGMII2_RD3",
192 "RGMII2_RD2",
193 "RGMII2_RD1",
194 "RGMII2_RD0",
195 "PMIC_INT1",
196 "GPMC_CSN0_Flash",
197 "MMC1_CLK",
198 "MMC1_CMD";
199};
200
201&gpio2 {
202 gpio-line-names =
203 "GPMC_CSN3_BUS",
204 "GPMC_CLK",
205 "GPMC_ADVN_ALE",
206 "GPMC_OEN_RE_N",
207 "GPMC_WE_N",
208 "GPMC_BEN0_CLE",
209 "NC",
210 "NC",
211 "NC",
212 "NC",
213 "NC",
214 "NC",
215 "NC",
216 "NC",
217 "NC",
218 "NC",
219 "NC",
220 "NC",
221 "SW2_0",
222 "SW2_1",
223 "NC",
224 "NC",
225 "NC",
226 "NC",
227 "NC",
228 "NC",
229 "MMC0_DAT3",
230 "MMC0_DAT2",
231 "MMC0_DAT1",
232 "MMC0_DAT0",
233 "MMC0_CLK",
234 "MMC0_CMD";
235};
236
237&gpio3 {
238 gpio-line-names =
239 "onrisc:red:power",
240 "NC",
241 "NC",
242 "NC",
243 "3G_PWR_EN",
244 "NC",
245 "NC",
246 "WLAN_IRQ",
247 "WLAN_EN",
248 "SW2_2",
249 "SW2_3",
250 "NC",
251 "NC",
252 "NC",
253 "NC",
254 "NC",
255 "NC",
256 "NC",
257 "NC",
258 "NC",
259 "NC",
260 "NC",
261 "NC",
262 "NC",
263 "NC",
264 "NC",
265 "NC",
266 "NC",
267 "NC",
268 "NC",
269 "NC",
270 "NC";
271};