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git01.mediatek.com / filogic / uboot / 59d10d0d44a725fe7d65c713c2cb1570e281edaa / . / arch / arm / include / asm / arch-tegra210 / pinmux.h
blob: 062d724319398d432d18d9e87af98f2ab0ecabd2 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stephen Warren5eafc482015-02-24 14:08:31 -0700[diff] [blame]2/*
3 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
Stephen Warren5eafc482015-02-24 14:08:31 -0700[diff] [blame]4 */
5
6#ifndef _TEGRA210_PINMUX_H_
7#define _TEGRA210_PINMUX_H_
8
9enum pmux_pingrp {
10 PMUX_PINGRP_SDMMC1_CLK_PM0,
11 PMUX_PINGRP_SDMMC1_CMD_PM1,
12 PMUX_PINGRP_SDMMC1_DAT3_PM2,
13 PMUX_PINGRP_SDMMC1_DAT2_PM3,
14 PMUX_PINGRP_SDMMC1_DAT1_PM4,
15 PMUX_PINGRP_SDMMC1_DAT0_PM5,
16 PMUX_PINGRP_SDMMC3_CLK_PP0 = (0x1c / 4),
17 PMUX_PINGRP_SDMMC3_CMD_PP1,
18 PMUX_PINGRP_SDMMC3_DAT0_PP5,
19 PMUX_PINGRP_SDMMC3_DAT1_PP4,
20 PMUX_PINGRP_SDMMC3_DAT2_PP3,
21 PMUX_PINGRP_SDMMC3_DAT3_PP2,
22 PMUX_PINGRP_PEX_L0_RST_N_PA0 = (0x38 / 4),
23 PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1,
24 PMUX_PINGRP_PEX_WAKE_N_PA2,
25 PMUX_PINGRP_PEX_L1_RST_N_PA3,
26 PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4,
27 PMUX_PINGRP_SATA_LED_ACTIVE_PA5,
28 PMUX_PINGRP_SPI1_MOSI_PC0,
29 PMUX_PINGRP_SPI1_MISO_PC1,
30 PMUX_PINGRP_SPI1_SCK_PC2,
31 PMUX_PINGRP_SPI1_CS0_PC3,
32 PMUX_PINGRP_SPI1_CS1_PC4,
33 PMUX_PINGRP_SPI2_MOSI_PB4,
34 PMUX_PINGRP_SPI2_MISO_PB5,
35 PMUX_PINGRP_SPI2_SCK_PB6,
36 PMUX_PINGRP_SPI2_CS0_PB7,
37 PMUX_PINGRP_SPI2_CS1_PDD0,
38 PMUX_PINGRP_SPI4_MOSI_PC7,
39 PMUX_PINGRP_SPI4_MISO_PD0,
40 PMUX_PINGRP_SPI4_SCK_PC5,
41 PMUX_PINGRP_SPI4_CS0_PC6,
42 PMUX_PINGRP_QSPI_SCK_PEE0,
43 PMUX_PINGRP_QSPI_CS_N_PEE1,
44 PMUX_PINGRP_QSPI_IO0_PEE2,
45 PMUX_PINGRP_QSPI_IO1_PEE3,
46 PMUX_PINGRP_QSPI_IO2_PEE4,
47 PMUX_PINGRP_QSPI_IO3_PEE5,
48 PMUX_PINGRP_DMIC1_CLK_PE0 = (0xa4 / 4),
49 PMUX_PINGRP_DMIC1_DAT_PE1,
50 PMUX_PINGRP_DMIC2_CLK_PE2,
51 PMUX_PINGRP_DMIC2_DAT_PE3,
52 PMUX_PINGRP_DMIC3_CLK_PE4,
53 PMUX_PINGRP_DMIC3_DAT_PE5,
54 PMUX_PINGRP_GEN1_I2C_SCL_PJ1,
55 PMUX_PINGRP_GEN1_I2C_SDA_PJ0,
56 PMUX_PINGRP_GEN2_I2C_SCL_PJ2,
57 PMUX_PINGRP_GEN2_I2C_SDA_PJ3,
58 PMUX_PINGRP_GEN3_I2C_SCL_PF0,
59 PMUX_PINGRP_GEN3_I2C_SDA_PF1,
60 PMUX_PINGRP_CAM_I2C_SCL_PS2,
61 PMUX_PINGRP_CAM_I2C_SDA_PS3,
62 PMUX_PINGRP_PWR_I2C_SCL_PY3,
63 PMUX_PINGRP_PWR_I2C_SDA_PY4,
64 PMUX_PINGRP_UART1_TX_PU0,
65 PMUX_PINGRP_UART1_RX_PU1,
66 PMUX_PINGRP_UART1_RTS_PU2,
67 PMUX_PINGRP_UART1_CTS_PU3,
68 PMUX_PINGRP_UART2_TX_PG0,
69 PMUX_PINGRP_UART2_RX_PG1,
70 PMUX_PINGRP_UART2_RTS_PG2,
71 PMUX_PINGRP_UART2_CTS_PG3,
72 PMUX_PINGRP_UART3_TX_PD1,
73 PMUX_PINGRP_UART3_RX_PD2,
74 PMUX_PINGRP_UART3_RTS_PD3,
75 PMUX_PINGRP_UART3_CTS_PD4,
76 PMUX_PINGRP_UART4_TX_PI4,
77 PMUX_PINGRP_UART4_RX_PI5,
78 PMUX_PINGRP_UART4_RTS_PI6,
79 PMUX_PINGRP_UART4_CTS_PI7,
80 PMUX_PINGRP_DAP1_FS_PB0,
81 PMUX_PINGRP_DAP1_DIN_PB1,
82 PMUX_PINGRP_DAP1_DOUT_PB2,
83 PMUX_PINGRP_DAP1_SCLK_PB3,
84 PMUX_PINGRP_DAP2_FS_PAA0,
85 PMUX_PINGRP_DAP2_DIN_PAA2,
86 PMUX_PINGRP_DAP2_DOUT_PAA3,
87 PMUX_PINGRP_DAP2_SCLK_PAA1,
88 PMUX_PINGRP_DAP4_FS_PJ4,
89 PMUX_PINGRP_DAP4_DIN_PJ5,
90 PMUX_PINGRP_DAP4_DOUT_PJ6,
91 PMUX_PINGRP_DAP4_SCLK_PJ7,
92 PMUX_PINGRP_CAM1_MCLK_PS0,
93 PMUX_PINGRP_CAM2_MCLK_PS1,
94 PMUX_PINGRP_JTAG_RTCK,
95 PMUX_PINGRP_CLK_32K_IN,
96 PMUX_PINGRP_CLK_32K_OUT_PY5,
97 PMUX_PINGRP_BATT_BCL,
98 PMUX_PINGRP_CLK_REQ,
99 PMUX_PINGRP_CPU_PWR_REQ,
100 PMUX_PINGRP_PWR_INT_N,
101 PMUX_PINGRP_SHUTDOWN,
102 PMUX_PINGRP_CORE_PWR_REQ,
103 PMUX_PINGRP_AUD_MCLK_PBB0,
104 PMUX_PINGRP_DVFS_PWM_PBB1,
105 PMUX_PINGRP_DVFS_CLK_PBB2,
106 PMUX_PINGRP_GPIO_X1_AUD_PBB3,
107 PMUX_PINGRP_GPIO_X3_AUD_PBB4,
108 PMUX_PINGRP_PCC7,
109 PMUX_PINGRP_HDMI_CEC_PCC0,
110 PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1,
111 PMUX_PINGRP_SPDIF_OUT_PCC2,
112 PMUX_PINGRP_SPDIF_IN_PCC3,
113 PMUX_PINGRP_USB_VBUS_EN0_PCC4,
114 PMUX_PINGRP_USB_VBUS_EN1_PCC5,
115 PMUX_PINGRP_DP_HPD0_PCC6,
116 PMUX_PINGRP_WIFI_EN_PH0,
117 PMUX_PINGRP_WIFI_RST_PH1,
118 PMUX_PINGRP_WIFI_WAKE_AP_PH2,
119 PMUX_PINGRP_AP_WAKE_BT_PH3,
120 PMUX_PINGRP_BT_RST_PH4,
121 PMUX_PINGRP_BT_WAKE_AP_PH5,
122 PMUX_PINGRP_AP_WAKE_NFC_PH7,
123 PMUX_PINGRP_NFC_EN_PI0,
124 PMUX_PINGRP_NFC_INT_PI1,
125 PMUX_PINGRP_GPS_EN_PI2,
126 PMUX_PINGRP_GPS_RST_PI3,
127 PMUX_PINGRP_CAM_RST_PS4,
128 PMUX_PINGRP_CAM_AF_EN_PS5,
129 PMUX_PINGRP_CAM_FLASH_EN_PS6,
130 PMUX_PINGRP_CAM1_PWDN_PS7,
131 PMUX_PINGRP_CAM2_PWDN_PT0,
132 PMUX_PINGRP_CAM1_STROBE_PT1,
133 PMUX_PINGRP_LCD_TE_PY2,
134 PMUX_PINGRP_LCD_BL_PWM_PV0,
135 PMUX_PINGRP_LCD_BL_EN_PV1,
136 PMUX_PINGRP_LCD_RST_PV2,
137 PMUX_PINGRP_LCD_GPIO1_PV3,
138 PMUX_PINGRP_LCD_GPIO2_PV4,
139 PMUX_PINGRP_AP_READY_PV5,
140 PMUX_PINGRP_TOUCH_RST_PV6,
141 PMUX_PINGRP_TOUCH_CLK_PV7,
142 PMUX_PINGRP_MODEM_WAKE_AP_PX0,
143 PMUX_PINGRP_TOUCH_INT_PX1,
144 PMUX_PINGRP_MOTION_INT_PX2,
145 PMUX_PINGRP_ALS_PROX_INT_PX3,
146 PMUX_PINGRP_TEMP_ALERT_PX4,
147 PMUX_PINGRP_BUTTON_POWER_ON_PX5,
148 PMUX_PINGRP_BUTTON_VOL_UP_PX6,
149 PMUX_PINGRP_BUTTON_VOL_DOWN_PX7,
150 PMUX_PINGRP_BUTTON_SLIDE_SW_PY0,
151 PMUX_PINGRP_BUTTON_HOME_PY1,
152 PMUX_PINGRP_PA6,
153 PMUX_PINGRP_PE6,
154 PMUX_PINGRP_PE7,
155 PMUX_PINGRP_PH6,
156 PMUX_PINGRP_PK0,
157 PMUX_PINGRP_PK1,
158 PMUX_PINGRP_PK2,
159 PMUX_PINGRP_PK3,
160 PMUX_PINGRP_PK4,
161 PMUX_PINGRP_PK5,
162 PMUX_PINGRP_PK6,
163 PMUX_PINGRP_PK7,
164 PMUX_PINGRP_PL0,
165 PMUX_PINGRP_PL1,
166 PMUX_PINGRP_PZ0,
167 PMUX_PINGRP_PZ1,
168 PMUX_PINGRP_PZ2,
169 PMUX_PINGRP_PZ3,
170 PMUX_PINGRP_PZ4,
171 PMUX_PINGRP_PZ5,
172 PMUX_PINGRP_COUNT,
173};
174
175enum pmux_drvgrp {
176 PMUX_DRVGRP_ALS_PROX_INT = (0x10 / 4),
177 PMUX_DRVGRP_AP_READY,
178 PMUX_DRVGRP_AP_WAKE_BT,
179 PMUX_DRVGRP_AP_WAKE_NFC,
180 PMUX_DRVGRP_AUD_MCLK,
181 PMUX_DRVGRP_BATT_BCL,
182 PMUX_DRVGRP_BT_RST,
183 PMUX_DRVGRP_BT_WAKE_AP,
184 PMUX_DRVGRP_BUTTON_HOME,
185 PMUX_DRVGRP_BUTTON_POWER_ON,
186 PMUX_DRVGRP_BUTTON_SLIDE_SW,
187 PMUX_DRVGRP_BUTTON_VOL_DOWN,
188 PMUX_DRVGRP_BUTTON_VOL_UP,
189 PMUX_DRVGRP_CAM1_MCLK,
190 PMUX_DRVGRP_CAM1_PWDN,
191 PMUX_DRVGRP_CAM1_STROBE,
192 PMUX_DRVGRP_CAM2_MCLK,
193 PMUX_DRVGRP_CAM2_PWDN,
194 PMUX_DRVGRP_CAM_AF_EN,
195 PMUX_DRVGRP_CAM_FLASH_EN,
196 PMUX_DRVGRP_CAM_I2C_SCL,
197 PMUX_DRVGRP_CAM_I2C_SDA,
198 PMUX_DRVGRP_CAM_RST,
199 PMUX_DRVGRP_CLK_32K_IN,
200 PMUX_DRVGRP_CLK_32K_OUT,
201 PMUX_DRVGRP_CLK_REQ,
202 PMUX_DRVGRP_CORE_PWR_REQ,
203 PMUX_DRVGRP_CPU_PWR_REQ,
204 PMUX_DRVGRP_DAP1_DIN,
205 PMUX_DRVGRP_DAP1_DOUT,
206 PMUX_DRVGRP_DAP1_FS,
207 PMUX_DRVGRP_DAP1_SCLK,
208 PMUX_DRVGRP_DAP2_DIN,
209 PMUX_DRVGRP_DAP2_DOUT,
210 PMUX_DRVGRP_DAP2_FS,
211 PMUX_DRVGRP_DAP2_SCLK,
212 PMUX_DRVGRP_DAP4_DIN,
213 PMUX_DRVGRP_DAP4_DOUT,
214 PMUX_DRVGRP_DAP4_FS,
215 PMUX_DRVGRP_DAP4_SCLK,
216 PMUX_DRVGRP_DMIC1_CLK,
217 PMUX_DRVGRP_DMIC1_DAT,
218 PMUX_DRVGRP_DMIC2_CLK,
219 PMUX_DRVGRP_DMIC2_DAT,
220 PMUX_DRVGRP_DMIC3_CLK,
221 PMUX_DRVGRP_DMIC3_DAT,
222 PMUX_DRVGRP_DP_HPD0,
223 PMUX_DRVGRP_DVFS_CLK,
224 PMUX_DRVGRP_DVFS_PWM,
225 PMUX_DRVGRP_GEN1_I2C_SCL,
226 PMUX_DRVGRP_GEN1_I2C_SDA,
227 PMUX_DRVGRP_GEN2_I2C_SCL,
228 PMUX_DRVGRP_GEN2_I2C_SDA,
229 PMUX_DRVGRP_GEN3_I2C_SCL,
230 PMUX_DRVGRP_GEN3_I2C_SDA,
231 PMUX_DRVGRP_PA6,
232 PMUX_DRVGRP_PCC7,
233 PMUX_DRVGRP_PE6,
234 PMUX_DRVGRP_PE7,
235 PMUX_DRVGRP_PH6,
236 PMUX_DRVGRP_PK0,
237 PMUX_DRVGRP_PK1,
238 PMUX_DRVGRP_PK2,
239 PMUX_DRVGRP_PK3,
240 PMUX_DRVGRP_PK4,
241 PMUX_DRVGRP_PK5,
242 PMUX_DRVGRP_PK6,
243 PMUX_DRVGRP_PK7,
244 PMUX_DRVGRP_PL0,
245 PMUX_DRVGRP_PL1,
246 PMUX_DRVGRP_PZ0,
247 PMUX_DRVGRP_PZ1,
248 PMUX_DRVGRP_PZ2,
249 PMUX_DRVGRP_PZ3,
250 PMUX_DRVGRP_PZ4,
251 PMUX_DRVGRP_PZ5,
252 PMUX_DRVGRP_GPIO_X1_AUD,
253 PMUX_DRVGRP_GPIO_X3_AUD,
254 PMUX_DRVGRP_GPS_EN,
255 PMUX_DRVGRP_GPS_RST,
256 PMUX_DRVGRP_HDMI_CEC,
257 PMUX_DRVGRP_HDMI_INT_DP_HPD,
258 PMUX_DRVGRP_JTAG_RTCK,
259 PMUX_DRVGRP_LCD_BL_EN,
260 PMUX_DRVGRP_LCD_BL_PWM,
261 PMUX_DRVGRP_LCD_GPIO1,
262 PMUX_DRVGRP_LCD_GPIO2,
263 PMUX_DRVGRP_LCD_RST,
264 PMUX_DRVGRP_LCD_TE,
265 PMUX_DRVGRP_MODEM_WAKE_AP,
266 PMUX_DRVGRP_MOTION_INT,
267 PMUX_DRVGRP_NFC_EN,
268 PMUX_DRVGRP_NFC_INT,
269 PMUX_DRVGRP_PEX_L0_CLKREQ_N,
270 PMUX_DRVGRP_PEX_L0_RST_N,
271 PMUX_DRVGRP_PEX_L1_CLKREQ_N,
272 PMUX_DRVGRP_PEX_L1_RST_N,
273 PMUX_DRVGRP_PEX_WAKE_N,
274 PMUX_DRVGRP_PWR_I2C_SCL,
275 PMUX_DRVGRP_PWR_I2C_SDA,
276 PMUX_DRVGRP_PWR_INT_N,
277 PMUX_DRVGRP_QSPI_SCK = (0x1bc / 4),
278 PMUX_DRVGRP_SATA_LED_ACTIVE,
279 PMUX_DRVGRP_SDMMC1,
280 PMUX_DRVGRP_SDMMC2,
281 PMUX_DRVGRP_SDMMC3 = (0x1dc / 4),
282 PMUX_DRVGRP_SDMMC4,
283 PMUX_DRVGRP_SHUTDOWN = (0x1f4 / 4),
284 PMUX_DRVGRP_SPDIF_IN,
285 PMUX_DRVGRP_SPDIF_OUT,
286 PMUX_DRVGRP_SPI1_CS0,
287 PMUX_DRVGRP_SPI1_CS1,
288 PMUX_DRVGRP_SPI1_MISO,
289 PMUX_DRVGRP_SPI1_MOSI,
290 PMUX_DRVGRP_SPI1_SCK,
291 PMUX_DRVGRP_SPI2_CS0,
292 PMUX_DRVGRP_SPI2_CS1,
293 PMUX_DRVGRP_SPI2_MISO,
294 PMUX_DRVGRP_SPI2_MOSI,
295 PMUX_DRVGRP_SPI2_SCK,
296 PMUX_DRVGRP_SPI4_CS0,
297 PMUX_DRVGRP_SPI4_MISO,
298 PMUX_DRVGRP_SPI4_MOSI,
299 PMUX_DRVGRP_SPI4_SCK,
300 PMUX_DRVGRP_TEMP_ALERT,
301 PMUX_DRVGRP_TOUCH_CLK,
302 PMUX_DRVGRP_TOUCH_INT,
303 PMUX_DRVGRP_TOUCH_RST,
304 PMUX_DRVGRP_UART1_CTS,
305 PMUX_DRVGRP_UART1_RTS,
306 PMUX_DRVGRP_UART1_RX,
307 PMUX_DRVGRP_UART1_TX,
308 PMUX_DRVGRP_UART2_CTS,
309 PMUX_DRVGRP_UART2_RTS,
310 PMUX_DRVGRP_UART2_RX,
311 PMUX_DRVGRP_UART2_TX,
312 PMUX_DRVGRP_UART3_CTS,
313 PMUX_DRVGRP_UART3_RTS,
314 PMUX_DRVGRP_UART3_RX,
315 PMUX_DRVGRP_UART3_TX,
316 PMUX_DRVGRP_UART4_CTS,
317 PMUX_DRVGRP_UART4_RTS,
318 PMUX_DRVGRP_UART4_RX,
319 PMUX_DRVGRP_UART4_TX,
320 PMUX_DRVGRP_USB_VBUS_EN0,
321 PMUX_DRVGRP_USB_VBUS_EN1,
322 PMUX_DRVGRP_WIFI_EN,
323 PMUX_DRVGRP_WIFI_RST,
324 PMUX_DRVGRP_WIFI_WAKE_AP,
325 PMUX_DRVGRP_COUNT,
326};
327
328enum pmux_func {
329 PMUX_FUNC_DEFAULT,
330 PMUX_FUNC_AUD,
331 PMUX_FUNC_BCL,
332 PMUX_FUNC_BLINK,
333 PMUX_FUNC_CCLA,
334 PMUX_FUNC_CEC,
335 PMUX_FUNC_CLDVFS,
336 PMUX_FUNC_CLK,
337 PMUX_FUNC_CORE,
338 PMUX_FUNC_CPU,
339 PMUX_FUNC_DISPLAYA,
340 PMUX_FUNC_DISPLAYB,
341 PMUX_FUNC_DMIC1,
342 PMUX_FUNC_DMIC2,
343 PMUX_FUNC_DMIC3,
344 PMUX_FUNC_DP,
345 PMUX_FUNC_DTV,
346 PMUX_FUNC_EXTPERIPH3,
347 PMUX_FUNC_I2C1,
348 PMUX_FUNC_I2C2,
349 PMUX_FUNC_I2C3,
350 PMUX_FUNC_I2CPMU,
351 PMUX_FUNC_I2CVI,
352 PMUX_FUNC_I2S1,
353 PMUX_FUNC_I2S2,
354 PMUX_FUNC_I2S3,
355 PMUX_FUNC_I2S4A,
356 PMUX_FUNC_I2S4B,
357 PMUX_FUNC_I2S5A,
358 PMUX_FUNC_I2S5B,
359 PMUX_FUNC_IQC0,
360 PMUX_FUNC_IQC1,
361 PMUX_FUNC_JTAG,
362 PMUX_FUNC_PE,
363 PMUX_FUNC_PE0,
364 PMUX_FUNC_PE1,
365 PMUX_FUNC_PMI,
366 PMUX_FUNC_PWM0,
367 PMUX_FUNC_PWM1,
368 PMUX_FUNC_PWM2,
369 PMUX_FUNC_PWM3,
370 PMUX_FUNC_QSPI,
371 PMUX_FUNC_SATA,
372 PMUX_FUNC_SDMMC1,
373 PMUX_FUNC_SDMMC3,
374 PMUX_FUNC_SHUTDOWN,
375 PMUX_FUNC_SOC,
376 PMUX_FUNC_SOR0,
377 PMUX_FUNC_SOR1,
378 PMUX_FUNC_SPDIF,
379 PMUX_FUNC_SPI1,
380 PMUX_FUNC_SPI2,
381 PMUX_FUNC_SPI3,
382 PMUX_FUNC_SPI4,
383 PMUX_FUNC_SYS,
384 PMUX_FUNC_TOUCH,
385 PMUX_FUNC_UART,
386 PMUX_FUNC_UARTA,
387 PMUX_FUNC_UARTB,
388 PMUX_FUNC_UARTC,
389 PMUX_FUNC_UARTD,
390 PMUX_FUNC_USB,
391 PMUX_FUNC_VGP1,
392 PMUX_FUNC_VGP2,
393 PMUX_FUNC_VGP3,
394 PMUX_FUNC_VGP4,
395 PMUX_FUNC_VGP5,
396 PMUX_FUNC_VGP6,
397 PMUX_FUNC_VIMCLK,
398 PMUX_FUNC_VIMCLK2,
399 PMUX_FUNC_RSVD0,
400 PMUX_FUNC_RSVD1,
401 PMUX_FUNC_RSVD2,
402 PMUX_FUNC_RSVD3,
403 PMUX_FUNC_COUNT,
404};
405
Svyatoslav Ryhelc53f4c02023-11-26 17:54:03 +0200[diff] [blame]406static const char * const tegra_pinctrl_to_pingrp[] = {
407 [PMUX_PINGRP_SDMMC1_CLK_PM0] = "sdmmc1_clk_pm0",
408 [PMUX_PINGRP_SDMMC1_CMD_PM1] = "sdmmc1_cmd_pm1",
409 [PMUX_PINGRP_SDMMC1_DAT3_PM2] = "sdmmc1_dat3_pm2",
410 [PMUX_PINGRP_SDMMC1_DAT2_PM3] = "sdmmc1_dat2_pm3",
411 [PMUX_PINGRP_SDMMC1_DAT1_PM4] = "sdmmc1_dat1_pm4",
412 [PMUX_PINGRP_SDMMC1_DAT0_PM5] = "sdmmc1_dat0_pm5",
413 [PMUX_PINGRP_SDMMC3_CLK_PP0] = "sdmmc3_clk_pp0",
414 [PMUX_PINGRP_SDMMC3_CMD_PP1] = "sdmmc3_cmd_pp1",
415 [PMUX_PINGRP_SDMMC3_DAT0_PP5] = "sdmmc3_dat0_pp5",
416 [PMUX_PINGRP_SDMMC3_DAT1_PP4] = "sdmmc3_dat1_pp4",
417 [PMUX_PINGRP_SDMMC3_DAT2_PP3] = "sdmmc3_dat2_pp3",
418 [PMUX_PINGRP_SDMMC3_DAT3_PP2] = "sdmmc3_dat3_pp2",
419 [PMUX_PINGRP_PEX_L0_RST_N_PA0] = "pex_l0_rst_n_pa0",
420 [PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1] = "pex_l0_clkreq_n_pa1",
421 [PMUX_PINGRP_PEX_WAKE_N_PA2] = "pex_wake_n_pa2",
422 [PMUX_PINGRP_PEX_L1_RST_N_PA3] = "pex_l1_rst_n_pa3",
423 [PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4] = "pex_l1_clkreq_n_pa4",
424 [PMUX_PINGRP_SATA_LED_ACTIVE_PA5] = "sata_led_active_pa5",
425 [PMUX_PINGRP_SPI1_MOSI_PC0] = "spi1_mosi_pc0",
426 [PMUX_PINGRP_SPI1_MISO_PC1] = "spi1_miso_pc1",
427 [PMUX_PINGRP_SPI1_SCK_PC2] = "spi1_sck_pc2",
428 [PMUX_PINGRP_SPI1_CS0_PC3] = "spi1_cs0_pc3",
429 [PMUX_PINGRP_SPI1_CS1_PC4] = "spi1_cs1_pc4",
430 [PMUX_PINGRP_SPI2_MOSI_PB4] = "spi2_mosi_pb4",
431 [PMUX_PINGRP_SPI2_MISO_PB5] = "spi2_miso_pb5",
432 [PMUX_PINGRP_SPI2_SCK_PB6] = "spi2_sck_pb6",
433 [PMUX_PINGRP_SPI2_CS0_PB7] = "spi2_cs0_pb7",
434 [PMUX_PINGRP_SPI2_CS1_PDD0] = "spi2_cs1_pdd0",
435 [PMUX_PINGRP_SPI4_MOSI_PC7] = "spi4_mosi_pc7",
436 [PMUX_PINGRP_SPI4_MISO_PD0] = "spi4_miso_pd0",
437 [PMUX_PINGRP_SPI4_SCK_PC5] = "spi4_sck_pc5",
438 [PMUX_PINGRP_SPI4_CS0_PC6] = "spi4_cs0_pc6",
439 [PMUX_PINGRP_QSPI_SCK_PEE0] = "qspi_sck_pee0",
440 [PMUX_PINGRP_QSPI_CS_N_PEE1] = "qspi_cs_n_pee1",
441 [PMUX_PINGRP_QSPI_IO0_PEE2] = "qspi_io0_pee2",
442 [PMUX_PINGRP_QSPI_IO1_PEE3] = "qspi_io1_pee3",
443 [PMUX_PINGRP_QSPI_IO2_PEE4] = "qspi_io2_pee4",
444 [PMUX_PINGRP_QSPI_IO3_PEE5] = "qspi_io3_pee5",
445 [PMUX_PINGRP_DMIC1_CLK_PE0] = "dmic1_clk_pe0",
446 [PMUX_PINGRP_DMIC1_DAT_PE1] = "dmic1_dat_pe1",
447 [PMUX_PINGRP_DMIC2_CLK_PE2] = "dmic2_clk_pe2",
448 [PMUX_PINGRP_DMIC2_DAT_PE3] = "dmic2_dat_pe3",
449 [PMUX_PINGRP_DMIC3_CLK_PE4] = "dmic3_clk_pe4",
450 [PMUX_PINGRP_DMIC3_DAT_PE5] = "dmic3_dat_pe5",
451 [PMUX_PINGRP_GEN1_I2C_SCL_PJ1] = "gen1_i2c_scl_pj1",
452 [PMUX_PINGRP_GEN1_I2C_SDA_PJ0] = "gen1_i2c_sda_pj0",
453 [PMUX_PINGRP_GEN2_I2C_SCL_PJ2] = "gen2_i2c_scl_pj2",
454 [PMUX_PINGRP_GEN2_I2C_SDA_PJ3] = "gen2_i2c_sda_pj3",
455 [PMUX_PINGRP_GEN3_I2C_SCL_PF0] = "gen3_i2c_scl_pf0",
456 [PMUX_PINGRP_GEN3_I2C_SDA_PF1] = "gen3_i2c_sda_pf1",
457 [PMUX_PINGRP_CAM_I2C_SCL_PS2] = "cam_i2c_scl_ps2",
458 [PMUX_PINGRP_CAM_I2C_SDA_PS3] = "cam_i2c_sda_ps3",
459 [PMUX_PINGRP_PWR_I2C_SCL_PY3] = "pwr_i2c_scl_py3",
460 [PMUX_PINGRP_PWR_I2C_SDA_PY4] = "pwr_i2c_sda_py4",
461 [PMUX_PINGRP_UART1_TX_PU0] = "uart1_tx_pu0",
462 [PMUX_PINGRP_UART1_RX_PU1] = "uart1_rx_pu1",
463 [PMUX_PINGRP_UART1_RTS_PU2] = "uart1_rts_pu2",
464 [PMUX_PINGRP_UART1_CTS_PU3] = "uart1_cts_pu3",
465 [PMUX_PINGRP_UART2_TX_PG0] = "uart2_tx_pg0",
466 [PMUX_PINGRP_UART2_RX_PG1] = "uart2_rx_pg1",
467 [PMUX_PINGRP_UART2_RTS_PG2] = "uart2_rts_pg2",
468 [PMUX_PINGRP_UART2_CTS_PG3] = "uart2_cts_pg3",
469 [PMUX_PINGRP_UART3_TX_PD1] = "uart3_tx_pd1",
470 [PMUX_PINGRP_UART3_RX_PD2] = "uart3_rx_pd2",
471 [PMUX_PINGRP_UART3_RTS_PD3] = "uart3_rts_pd3",
472 [PMUX_PINGRP_UART3_CTS_PD4] = "uart3_cts_pd4",
473 [PMUX_PINGRP_UART4_TX_PI4] = "uart4_tx_pi4",
474 [PMUX_PINGRP_UART4_RX_PI5] = "uart4_rx_pi5",
475 [PMUX_PINGRP_UART4_RTS_PI6] = "uart4_rts_pi6",
476 [PMUX_PINGRP_UART4_CTS_PI7] = "uart4_cts_pi7",
477 [PMUX_PINGRP_DAP1_FS_PB0] = "dap1_fs_pb0",
478 [PMUX_PINGRP_DAP1_DIN_PB1] = "dap1_din_pb1",
479 [PMUX_PINGRP_DAP1_DOUT_PB2] = "dap1_dout_pb2",
480 [PMUX_PINGRP_DAP1_SCLK_PB3] = "dap1_sclk_pb3",
481 [PMUX_PINGRP_DAP2_FS_PAA0] = "dap2_fs_paa0",
482 [PMUX_PINGRP_DAP2_DIN_PAA2] = "dap2_din_paa2",
483 [PMUX_PINGRP_DAP2_DOUT_PAA3] = "dap2_dout_paa3",
484 [PMUX_PINGRP_DAP2_SCLK_PAA1] = "dap2_sclk_paa1",
485 [PMUX_PINGRP_DAP4_FS_PJ4] = "dap4_fs_pj4",
486 [PMUX_PINGRP_DAP4_DIN_PJ5] = "dap4_din_pj5",
487 [PMUX_PINGRP_DAP4_DOUT_PJ6] = "dap4_dout_pj6",
488 [PMUX_PINGRP_DAP4_SCLK_PJ7] = "dap4_sclk_pj7",
489 [PMUX_PINGRP_CAM1_MCLK_PS0] = "cam1_mclk_ps0",
490 [PMUX_PINGRP_CAM2_MCLK_PS1] = "cam2_mclk_ps1",
491 [PMUX_PINGRP_JTAG_RTCK] = "jtag_rtck",
492 [PMUX_PINGRP_CLK_32K_IN] = "clk_32k_in",
493 [PMUX_PINGRP_CLK_32K_OUT_PY5] = "clk_32k_out_py5",
494 [PMUX_PINGRP_BATT_BCL] = "batt_bcl",
495 [PMUX_PINGRP_CLK_REQ] = "clk_req",
496 [PMUX_PINGRP_CPU_PWR_REQ] = "cpu_pwr_req",
497 [PMUX_PINGRP_PWR_INT_N] = "pwr_int_n",
498 [PMUX_PINGRP_SHUTDOWN] = "shutdown",
499 [PMUX_PINGRP_CORE_PWR_REQ] = "core_pwr_req",
500 [PMUX_PINGRP_AUD_MCLK_PBB0] = "aud_mclk_pbb0",
501 [PMUX_PINGRP_DVFS_PWM_PBB1] = "dvfs_pwm_pbb1",
502 [PMUX_PINGRP_DVFS_CLK_PBB2] = "dvfs_clk_pbb2",
503 [PMUX_PINGRP_GPIO_X1_AUD_PBB3] = "gpio_x1_aud_pbb3",
504 [PMUX_PINGRP_GPIO_X3_AUD_PBB4] = "gpio_x3_aud_pbb4",
505 [PMUX_PINGRP_PCC7] = "pcc7",
506 [PMUX_PINGRP_HDMI_CEC_PCC0] = "hdmi_cec_pcc0",
507 [PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1] = "hdmi_int_dp_hpd_pcc1",
508 [PMUX_PINGRP_SPDIF_OUT_PCC2] = "spdif_out_pcc2",
509 [PMUX_PINGRP_SPDIF_IN_PCC3] = "spdif_in_pcc3",
510 [PMUX_PINGRP_USB_VBUS_EN0_PCC4] = "usb_vbus_en0_pcc4",
511 [PMUX_PINGRP_USB_VBUS_EN1_PCC5] = "usb_vbus_en1_pcc5",
512 [PMUX_PINGRP_DP_HPD0_PCC6] = "dp_hpd0_pcc6",
513 [PMUX_PINGRP_WIFI_EN_PH0] = "wifi_en_ph0",
514 [PMUX_PINGRP_WIFI_RST_PH1] = "wifi_rst_ph1",
515 [PMUX_PINGRP_WIFI_WAKE_AP_PH2] = "wifi_wake_ap_ph2",
516 [PMUX_PINGRP_AP_WAKE_BT_PH3] = "ap_wake_bt_ph3",
517 [PMUX_PINGRP_BT_RST_PH4] = "bt_rst_ph4",
518 [PMUX_PINGRP_BT_WAKE_AP_PH5] = "bt_wake_ap_ph5",
519 [PMUX_PINGRP_AP_WAKE_NFC_PH7] = "ap_wake_nfc_ph7",
520 [PMUX_PINGRP_NFC_EN_PI0] = "nfc_en_pi0",
521 [PMUX_PINGRP_NFC_INT_PI1] = "nfc_int_pi1",
522 [PMUX_PINGRP_GPS_EN_PI2] = "gps_en_pi2",
523 [PMUX_PINGRP_GPS_RST_PI3] = "gps_rst_pi3",
524 [PMUX_PINGRP_CAM_RST_PS4] = "cam_rst_ps4",
525 [PMUX_PINGRP_CAM_AF_EN_PS5] = "cam_af_en_ps5",
526 [PMUX_PINGRP_CAM_FLASH_EN_PS6] = "cam_flash_en_ps6",
527 [PMUX_PINGRP_CAM1_PWDN_PS7] = "cam1_pwdn_ps7",
528 [PMUX_PINGRP_CAM2_PWDN_PT0] = "cam2_pwdn_pt0",
529 [PMUX_PINGRP_CAM1_STROBE_PT1] = "cam1_strobe_pt1",
530 [PMUX_PINGRP_LCD_TE_PY2] = "lcd_te_py2",
531 [PMUX_PINGRP_LCD_BL_PWM_PV0] = "lcd_bl_pwm_pv0",
532 [PMUX_PINGRP_LCD_BL_EN_PV1] = "lcd_bl_en_pv1",
533 [PMUX_PINGRP_LCD_RST_PV2] = "lcd_rst_pv2",
534 [PMUX_PINGRP_LCD_GPIO1_PV3] = "lcd_gpio1_pv3",
535 [PMUX_PINGRP_LCD_GPIO2_PV4] = "lcd_gpio2_pv4",
536 [PMUX_PINGRP_AP_READY_PV5] = "ap_ready_pv5",
537 [PMUX_PINGRP_TOUCH_RST_PV6] = "touch_rst_pv6",
538 [PMUX_PINGRP_TOUCH_CLK_PV7] = "touch_clk_pv7",
539 [PMUX_PINGRP_MODEM_WAKE_AP_PX0] = "modem_wake_ap_px0",
540 [PMUX_PINGRP_TOUCH_INT_PX1] = "touch_int_px1",
541 [PMUX_PINGRP_MOTION_INT_PX2] = "motion_int_px2",
542 [PMUX_PINGRP_ALS_PROX_INT_PX3] = "als_prox_int_px3",
543 [PMUX_PINGRP_TEMP_ALERT_PX4] = "temp_alert_px4",
544 [PMUX_PINGRP_BUTTON_POWER_ON_PX5] = "button_power_on_px5",
545 [PMUX_PINGRP_BUTTON_VOL_UP_PX6] = "button_vol_up_px6",
546 [PMUX_PINGRP_BUTTON_VOL_DOWN_PX7] = "button_vol_down_px7",
547 [PMUX_PINGRP_BUTTON_SLIDE_SW_PY0] = "button_slide_sw_py0",
548 [PMUX_PINGRP_BUTTON_HOME_PY1] = "button_home_py1",
549 [PMUX_PINGRP_PA6] = "pa6",
550 [PMUX_PINGRP_PE6] = "pe6",
551 [PMUX_PINGRP_PE7] = "pe7",
552 [PMUX_PINGRP_PH6] = "ph6",
553 [PMUX_PINGRP_PK0] = "pk0",
554 [PMUX_PINGRP_PK1] = "pk1",
555 [PMUX_PINGRP_PK2] = "pk2",
556 [PMUX_PINGRP_PK3] = "pk3",
557 [PMUX_PINGRP_PK4] = "pk4",
558 [PMUX_PINGRP_PK5] = "pk5",
559 [PMUX_PINGRP_PK6] = "pk6",
560 [PMUX_PINGRP_PK7] = "pk7",
561 [PMUX_PINGRP_PL0] = "pl0",
562 [PMUX_PINGRP_PL1] = "pl1",
563 [PMUX_PINGRP_PZ0] = "pz0",
564 [PMUX_PINGRP_PZ1] = "pz1",
565 [PMUX_PINGRP_PZ2] = "pz2",
566 [PMUX_PINGRP_PZ3] = "pz3",
567 [PMUX_PINGRP_PZ4] = "pz4",
568 [PMUX_PINGRP_PZ5] = "pz5",
569};
570
571static const char * const tegra_pinctrl_to_drvgrp[] = {
572 [PMUX_DRVGRP_ALS_PROX_INT] = "als_prox_int",
573 [PMUX_DRVGRP_AP_READY] = "ap_ready",
574 [PMUX_DRVGRP_AP_WAKE_BT] = "ap_wake_bt",
575 [PMUX_DRVGRP_AP_WAKE_NFC] = "ap_wake_nfc",
576 [PMUX_DRVGRP_AUD_MCLK] = "aud_mclk",
577 [PMUX_DRVGRP_BATT_BCL] = "batt_bcl",
578 [PMUX_DRVGRP_BT_RST] = "bt_rst",
579 [PMUX_DRVGRP_BT_WAKE_AP] = "bt_wake_ap",
580 [PMUX_DRVGRP_BUTTON_HOME] = "button_home",
581 [PMUX_DRVGRP_BUTTON_POWER_ON] = "button_power_on",
582 [PMUX_DRVGRP_BUTTON_SLIDE_SW] = "button_slide_sw",
583 [PMUX_DRVGRP_BUTTON_VOL_DOWN] = "button_vol_down",
584 [PMUX_DRVGRP_BUTTON_VOL_UP] = "button_vol_up",
585 [PMUX_DRVGRP_CAM1_MCLK] = "cam1_mclk",
586 [PMUX_DRVGRP_CAM1_PWDN] = "cam1_pwdn",
587 [PMUX_DRVGRP_CAM1_STROBE] = "cam1_strobe",
588 [PMUX_DRVGRP_CAM2_MCLK] = "cam2_mclk",
589 [PMUX_DRVGRP_CAM2_PWDN] = "cam2_pwdn",
590 [PMUX_DRVGRP_CAM_AF_EN] = "cam_af_en",
591 [PMUX_DRVGRP_CAM_FLASH_EN] = "cam_flash_en",
592 [PMUX_DRVGRP_CAM_I2C_SCL] = "cam_i2c_scl",
593 [PMUX_DRVGRP_CAM_I2C_SDA] = "cam_i2c_sda",
594 [PMUX_DRVGRP_CAM_RST] = "cam_rst",
595 [PMUX_DRVGRP_CLK_32K_IN] = "clk_32k_in",
596 [PMUX_DRVGRP_CLK_32K_OUT] = "clk_32k_out",
597 [PMUX_DRVGRP_CLK_REQ] = "clk_req",
598 [PMUX_DRVGRP_CORE_PWR_REQ] = "core_pwr_req",
599 [PMUX_DRVGRP_CPU_PWR_REQ] = "cpu_pwr_req",
600 [PMUX_DRVGRP_DAP1_DIN] = "dap1_din",
601 [PMUX_DRVGRP_DAP1_DOUT] = "dap1_dout",
602 [PMUX_DRVGRP_DAP1_FS] = "dap1_fs",
603 [PMUX_DRVGRP_DAP1_SCLK] = "dap1_sclk",
604 [PMUX_DRVGRP_DAP2_DIN] = "dap2_din",
605 [PMUX_DRVGRP_DAP2_DOUT] = "dap2_dout",
606 [PMUX_DRVGRP_DAP2_FS] = "dap2_fs",
607 [PMUX_DRVGRP_DAP2_SCLK] = "dap2_sclk",
608 [PMUX_DRVGRP_DAP4_DIN] = "dap4_din",
609 [PMUX_DRVGRP_DAP4_DOUT] = "dap4_dout",
610 [PMUX_DRVGRP_DAP4_FS] = "dap4_fs",
611 [PMUX_DRVGRP_DAP4_SCLK] = "dap4_sclk",
612 [PMUX_DRVGRP_DMIC1_CLK] = "dmic1_clk",
613 [PMUX_DRVGRP_DMIC1_DAT] = "dmic1_dat",
614 [PMUX_DRVGRP_DMIC2_CLK] = "dmic2_clk",
615 [PMUX_DRVGRP_DMIC2_DAT] = "dmic2_dat",
616 [PMUX_DRVGRP_DMIC3_CLK] = "dmic3_clk",
617 [PMUX_DRVGRP_DMIC3_DAT] = "dmic3_dat",
618 [PMUX_DRVGRP_DP_HPD0] = "dp_hpd0",
619 [PMUX_DRVGRP_DVFS_CLK] = "dvfs_clk",
620 [PMUX_DRVGRP_DVFS_PWM] = "dvfs_pwm",
621 [PMUX_DRVGRP_GEN1_I2C_SCL] = "gen1_i2c_scl",
622 [PMUX_DRVGRP_GEN1_I2C_SDA] = "gen1_i2c_sda",
623 [PMUX_DRVGRP_GEN2_I2C_SCL] = "gen2_i2c_scl",
624 [PMUX_DRVGRP_GEN2_I2C_SDA] = "gen2_i2c_sda",
625 [PMUX_DRVGRP_GEN3_I2C_SCL] = "gen3_i2c_scl",
626 [PMUX_DRVGRP_GEN3_I2C_SDA] = "gen3_i2c_sda",
627 [PMUX_DRVGRP_PA6] = "pa6",
628 [PMUX_DRVGRP_PCC7] = "pcc7",
629 [PMUX_DRVGRP_PE6] = "pe6",
630 [PMUX_DRVGRP_PE7] = "pe7",
631 [PMUX_DRVGRP_PH6] = "ph6",
632 [PMUX_DRVGRP_PK0] = "pk0",
633 [PMUX_DRVGRP_PK1] = "pk1",
634 [PMUX_DRVGRP_PK2] = "pk2",
635 [PMUX_DRVGRP_PK3] = "pk3",
636 [PMUX_DRVGRP_PK4] = "pk4",
637 [PMUX_DRVGRP_PK5] = "pk5",
638 [PMUX_DRVGRP_PK6] = "pk6",
639 [PMUX_DRVGRP_PK7] = "pk7",
640 [PMUX_DRVGRP_PL0] = "pl0",
641 [PMUX_DRVGRP_PL1] = "pl1",
642 [PMUX_DRVGRP_PZ0] = "pz0",
643 [PMUX_DRVGRP_PZ1] = "pz1",
644 [PMUX_DRVGRP_PZ2] = "pz2",
645 [PMUX_DRVGRP_PZ3] = "pz3",
646 [PMUX_DRVGRP_PZ4] = "pz4",
647 [PMUX_DRVGRP_PZ5] = "pz5",
648 [PMUX_DRVGRP_GPIO_X1_AUD] = "gpio_x1_aud",
649 [PMUX_DRVGRP_GPIO_X3_AUD] = "gpio_x3_aud",
650 [PMUX_DRVGRP_GPS_EN] = "gps_en",
651 [PMUX_DRVGRP_GPS_RST] = "gps_rst",
652 [PMUX_DRVGRP_HDMI_CEC] = "hdmi_cec",
653 [PMUX_DRVGRP_HDMI_INT_DP_HPD] = "hdmi_int_dp_hpd",
654 [PMUX_DRVGRP_JTAG_RTCK] = "jtag_rtck",
655 [PMUX_DRVGRP_LCD_BL_EN] = "lcd_bl_en",
656 [PMUX_DRVGRP_LCD_BL_PWM] = "lcd_bl_pwm",
657 [PMUX_DRVGRP_LCD_GPIO1] = "lcd_gpio1",
658 [PMUX_DRVGRP_LCD_GPIO2] = "lcd_gpio2",
659 [PMUX_DRVGRP_LCD_RST] = "lcd_rst",
660 [PMUX_DRVGRP_LCD_TE] = "lcd_te",
661 [PMUX_DRVGRP_MODEM_WAKE_AP] = "modem_wake_ap",
662 [PMUX_DRVGRP_MOTION_INT] = "motion_int",
663 [PMUX_DRVGRP_NFC_EN] = "nfc_en",
664 [PMUX_DRVGRP_NFC_INT] = "nfc_int",
665 [PMUX_DRVGRP_PEX_L0_CLKREQ_N] = "pex_l0_clkreq_n",
666 [PMUX_DRVGRP_PEX_L0_RST_N] = "pex_l0_rst_n",
667 [PMUX_DRVGRP_PEX_L1_CLKREQ_N] = "pex_l1_clkreq_n",
668 [PMUX_DRVGRP_PEX_L1_RST_N] = "pex_l1_rst_n",
669 [PMUX_DRVGRP_PEX_WAKE_N] = "pex_wake_n",
670 [PMUX_DRVGRP_PWR_I2C_SCL] = "pwr_i2c_scl",
671 [PMUX_DRVGRP_PWR_I2C_SDA] = "pwr_i2c_sda",
672 [PMUX_DRVGRP_PWR_INT_N] = "pwr_int_n",
673 [PMUX_DRVGRP_QSPI_SCK] = "qspi_sck",
674 [PMUX_DRVGRP_SATA_LED_ACTIVE] = "sata_led_active",
675 [PMUX_DRVGRP_SDMMC1] = "sdmmc1",
676 [PMUX_DRVGRP_SDMMC2] = "sdmmc2",
677 [PMUX_DRVGRP_SDMMC3] = "sdmmc3",
678 [PMUX_DRVGRP_SDMMC4] = "sdmmc4",
679 [PMUX_DRVGRP_SHUTDOWN] = "shutdown",
680 [PMUX_DRVGRP_SPDIF_IN] = "spdif_in",
681 [PMUX_DRVGRP_SPDIF_OUT] = "spdif_out",
682 [PMUX_DRVGRP_SPI1_CS0] = "spi1_cs0",
683 [PMUX_DRVGRP_SPI1_CS1] = "spi1_cs1",
684 [PMUX_DRVGRP_SPI1_MISO] = "spi1_miso",
685 [PMUX_DRVGRP_SPI1_MOSI] = "spi1_mosi",
686 [PMUX_DRVGRP_SPI1_SCK] = "spi1_sck",
687 [PMUX_DRVGRP_SPI2_CS0] = "spi2_cs0",
688 [PMUX_DRVGRP_SPI2_CS1] = "spi2_cs1",
689 [PMUX_DRVGRP_SPI2_MISO] = "spi2_miso",
690 [PMUX_DRVGRP_SPI2_MOSI] = "spi2_mosi",
691 [PMUX_DRVGRP_SPI2_SCK] = "spi2_sck",
692 [PMUX_DRVGRP_SPI4_CS0] = "spi4_cs0",
693 [PMUX_DRVGRP_SPI4_MISO] = "spi4_miso",
694 [PMUX_DRVGRP_SPI4_MOSI] = "spi4_mosi",
695 [PMUX_DRVGRP_SPI4_SCK] = "spi4_sck",
696 [PMUX_DRVGRP_TEMP_ALERT] = "temp_alert",
697 [PMUX_DRVGRP_TOUCH_CLK] = "touch_clk",
698 [PMUX_DRVGRP_TOUCH_INT] = "touch_int",
699 [PMUX_DRVGRP_TOUCH_RST] = "touch_rst",
700 [PMUX_DRVGRP_UART1_CTS] = "uart1_cts",
701 [PMUX_DRVGRP_UART1_RTS] = "uart1_rts",
702 [PMUX_DRVGRP_UART1_RX] = "uart1_rx",
703 [PMUX_DRVGRP_UART1_TX] = "uart1_tx",
704 [PMUX_DRVGRP_UART2_CTS] = "uart2_cts",
705 [PMUX_DRVGRP_UART2_RTS] = "uart2_rts",
706 [PMUX_DRVGRP_UART2_RX] = "uart2_rx",
707 [PMUX_DRVGRP_UART2_TX] = "uart2_tx",
708 [PMUX_DRVGRP_UART3_CTS] = "uart3_cts",
709 [PMUX_DRVGRP_UART3_RTS] = "uart3_rts",
710 [PMUX_DRVGRP_UART3_RX] = "uart3_rx",
711 [PMUX_DRVGRP_UART3_TX] = "uart3_tx",
712 [PMUX_DRVGRP_UART4_CTS] = "uart4_cts",
713 [PMUX_DRVGRP_UART4_RTS] = "uart4_rts",
714 [PMUX_DRVGRP_UART4_RX] = "uart4_rx",
715 [PMUX_DRVGRP_UART4_TX] = "uart4_tx",
716 [PMUX_DRVGRP_USB_VBUS_EN0] = "usb_vbus_en0",
717 [PMUX_DRVGRP_USB_VBUS_EN1] = "usb_vbus_en1",
718 [PMUX_DRVGRP_WIFI_EN] = "wifi_en",
719 [PMUX_DRVGRP_WIFI_RST] = "wifi_rst",
720 [PMUX_DRVGRP_WIFI_WAKE_AP] = "wifi_wake_ap",
721};
722
723static const char * const tegra_pinctrl_to_func[] = {
724 [PMUX_FUNC_DEFAULT] = "default",
725 [PMUX_FUNC_AUD] = "aud",
726 [PMUX_FUNC_BCL] = "bcl",
727 [PMUX_FUNC_BLINK] = "blink",
728 [PMUX_FUNC_CCLA] = "ccla",
729 [PMUX_FUNC_CEC] = "cec",
730 [PMUX_FUNC_CLDVFS] = "cldvfs",
731 [PMUX_FUNC_CLK] = "clk",
732 [PMUX_FUNC_CORE] = "core",
733 [PMUX_FUNC_CPU] = "cpu",
734 [PMUX_FUNC_DISPLAYA] = "displaya",
735 [PMUX_FUNC_DISPLAYB] = "displayb",
736 [PMUX_FUNC_DMIC1] = "dmic1",
737 [PMUX_FUNC_DMIC2] = "dmic2",
738 [PMUX_FUNC_DMIC3] = "dmic3",
739 [PMUX_FUNC_DP] = "dp",
740 [PMUX_FUNC_DTV] = "dtv",
741 [PMUX_FUNC_EXTPERIPH3] = "extperiph3",
742 [PMUX_FUNC_I2C1] = "i2c1",
743 [PMUX_FUNC_I2C2] = "i2c2",
744 [PMUX_FUNC_I2C3] = "i2c3",
745 [PMUX_FUNC_I2CPMU] = "i2cpmu",
746 [PMUX_FUNC_I2CVI] = "i2cvi",
747 [PMUX_FUNC_I2S1] = "i2s1",
748 [PMUX_FUNC_I2S2] = "i2s2",
749 [PMUX_FUNC_I2S3] = "i2s3",
750 [PMUX_FUNC_I2S4A] = "i2s4a",
751 [PMUX_FUNC_I2S4B] = "i2s4b",
752 [PMUX_FUNC_I2S5A] = "i2s5a",
753 [PMUX_FUNC_I2S5B] = "i2s5b",
754 [PMUX_FUNC_IQC0] = "iqc0",
755 [PMUX_FUNC_IQC1] = "iqc1",
756 [PMUX_FUNC_JTAG] = "jtag",
757 [PMUX_FUNC_PE] = "pe",
758 [PMUX_FUNC_PE0] = "pe0",
759 [PMUX_FUNC_PE1] = "pe1",
760 [PMUX_FUNC_PMI] = "pmi",
761 [PMUX_FUNC_PWM0] = "pwm0",
762 [PMUX_FUNC_PWM1] = "pwm1",
763 [PMUX_FUNC_PWM2] = "pwm2",
764 [PMUX_FUNC_PWM3] = "pwm3",
765 [PMUX_FUNC_QSPI] = "qspi",
766 [PMUX_FUNC_SATA] = "sata",
767 [PMUX_FUNC_SDMMC1] = "sdmmc1",
768 [PMUX_FUNC_SDMMC3] = "sdmmc3",
769 [PMUX_FUNC_SHUTDOWN] = "shutdown",
770 [PMUX_FUNC_SOC] = "soc",
771 [PMUX_FUNC_SOR0] = "sor0",
772 [PMUX_FUNC_SOR1] = "sor1",
773 [PMUX_FUNC_SPDIF] = "spdif",
774 [PMUX_FUNC_SPI1] = "spi1",
775 [PMUX_FUNC_SPI2] = "spi2",
776 [PMUX_FUNC_SPI3] = "spi3",
777 [PMUX_FUNC_SPI4] = "spi4",
778 [PMUX_FUNC_SYS] = "sys",
779 [PMUX_FUNC_TOUCH] = "touch",
780 [PMUX_FUNC_UART] = "uart",
781 [PMUX_FUNC_UARTA] = "uarta",
782 [PMUX_FUNC_UARTB] = "uartb",
783 [PMUX_FUNC_UARTC] = "uartc",
784 [PMUX_FUNC_UARTD] = "uartd",
785 [PMUX_FUNC_USB] = "usb",
786 [PMUX_FUNC_VGP1] = "vgp1",
787 [PMUX_FUNC_VGP2] = "vgp2",
788 [PMUX_FUNC_VGP3] = "vgp3",
789 [PMUX_FUNC_VGP4] = "vgp4",
790 [PMUX_FUNC_VGP5] = "vgp5",
791 [PMUX_FUNC_VGP6] = "vgp6",
792 [PMUX_FUNC_VIMCLK] = "vimclk",
793 [PMUX_FUNC_VIMCLK2] = "vimclk2",
794 [PMUX_FUNC_RSVD0] = "rsvd0",
795 [PMUX_FUNC_RSVD1] = "rsvd1",
796 [PMUX_FUNC_RSVD2] = "rsvd2",
797 [PMUX_FUNC_RSVD3] = "rsvd3",
798};
799
Stephen Warren5eafc482015-02-24 14:08:31 -0700[diff] [blame]800#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x8d4
801#define TEGRA_PMX_SOC_HAS_IO_CLAMPING
802#define TEGRA_PMX_SOC_HAS_DRVGRPS
803#define TEGRA_PMX_PINS_HAVE_E_INPUT
804#define TEGRA_PMX_PINS_HAVE_LOCK
805#define TEGRA_PMX_PINS_HAVE_OD
806#define TEGRA_PMX_PINS_HAVE_E_IO_HV
807#include <asm/arch-tegra/pinmux.h>
808
809#endif /* _TEGRA210_PINMUX_H_ */