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Pali Rohár248ef0a2012-10-29 07:54:01 +00001/*
2 * (C) Copyright 2011-2012
3 * Pali Rohár <pali.rohar@gmail.com>
4 *
5 * (C) Copyright 2010
6 * Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * Derived from Beagle Board code:
9 * (C) Copyright 2006-2008
10 * Texas Instruments.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 * Syed Mohammed Khasim <x0khasim@ti.com>
13 *
14 * Configuration settings for the Nokia RX-51 aka N900.
15 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020016 * SPDX-License-Identifier: GPL-2.0+
Pali Rohár248ef0a2012-10-29 07:54:01 +000017 */
18
19#ifndef __CONFIG_H
20#define __CONFIG_H
21
22/*
23 * High Level Configuration Options
24 */
25
26#define CONFIG_OMAP /* in a TI OMAP core */
Pali Rohár248ef0a2012-10-29 07:54:01 +000027#define CONFIG_OMAP3430 /* which is in a 3430 */
28#define CONFIG_OMAP3_RX51 /* working with RX51 */
29#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
Lokesh Vutla56055052013-07-30 11:36:30 +053030#define CONFIG_OMAP_COMMON
Pali Rohár248ef0a2012-10-29 07:54:01 +000031
32#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
33
34/*
35 * Nokia X-Loader loading secondary image to address 0x80400000
36 * NOLO loading boot image to random place, so it doesn't really
37 * matter what we set this to. We have to copy u-boot to this address
38 */
39#define CONFIG_SYS_TEXT_BASE 0x80008000
40
41#define CONFIG_SDRC /* The chip has SDRC controller */
42
43#include <asm/arch/cpu.h> /* get chip and board defs */
44#include <asm/arch/omap3.h>
45#include <asm/arch/mem.h>
46#include <linux/stringify.h>
47
48/*
49 * Display CPU and Board information
50 */
51#define CONFIG_DISPLAY_CPUINFO
52#define CONFIG_DISPLAY_BOARDINFO
53
54/* Clock Defines */
55#define V_OSCK 26000000 /* Clock output from T2 */
56#define V_SCLK (V_OSCK >> 1)
57
58#undef CONFIG_USE_IRQ /* no support for IRQs */
59#define CONFIG_MISC_INIT_R
60#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
61
62#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
63#define CONFIG_INITRD_TAG /* enable passing initrd */
64#define CONFIG_REVISION_TAG /* enable passing revision tag*/
65#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
66
67/*
68 * Size of malloc() pool
69 */
70#define CONFIG_ENV_SIZE (128 << 10)
71#define CONFIG_UBI_SIZE (512 << 10)
72#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
73 (128 << 10))
74
75/*
76 * Hardware drivers
77 */
78
79/*
80 * NS16550 Configuration
81 */
82#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
83
84#define CONFIG_SYS_NS16550
85#define CONFIG_SYS_NS16550_SERIAL
86#define CONFIG_SYS_NS16550_REG_SIZE (-4)
87#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
88
89/*
90 * select serial console configuration
91 */
92#define CONFIG_CONS_INDEX 3
93#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
94#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
95
96/* allow to overwrite serial and ethaddr */
97#define CONFIG_ENV_OVERWRITE
98#define CONFIG_BAUDRATE 115200
99#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
100#define CONFIG_MMC
101#define CONFIG_GENERIC_MMC
102#define CONFIG_OMAP_HSMMC
103#define CONFIG_DOS_PARTITION
104
105/* USB */
106#define CONFIG_MUSB_UDC
107#define CONFIG_MUSB_HDC
108#define CONFIG_USB_OMAP3
109#define CONFIG_TWL4030_USB
110
111/* USB device configuration */
112#define CONFIG_USB_DEVICE
113#define CONFIG_USBD_VENDORID 0x0421
114#define CONFIG_USBD_PRODUCTID 0x01c8
115#define CONFIG_USBD_MANUFACTURER "Nokia"
116#define CONFIG_USBD_PRODUCT_NAME "N900"
117
118#define CONFIG_SYS_CONSOLE_IS_IN_ENV
119#define CONFIG_SYS_NO_FLASH
120
121/* commands to include */
122#include <config_cmd_default.h>
123
124#define CONFIG_CMD_EXT2 /* EXT2 Support */
125#define CONFIG_CMD_EXT4 /* EXT4 Support */
126#define CONFIG_CMD_FAT /* FAT support */
127
128#define CONFIG_CMD_I2C /* I2C serial bus support */
129#define CONFIG_CMD_MMC /* MMC support */
130#define CONFIG_CMD_GPIO /* Enable gpio command */
131
132#define CONFIG_CMDLINE_EDITING /* add command line history */
133#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
134
Pali Rohár13eb3e42013-03-07 05:15:19 +0000135#define CONFIG_CMD_BOOTMENU /* ANSI terminal Boot Menu */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000136#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */
137
138#ifdef ONENAND_SUPPORT
139
140#define CONFIG_CMD_ONENAND /* ONENAND support */
141#define CONFIG_CMD_MTDPARTS /* mtd parts support */
142
143#ifdef UBIFS_SUPPORT
144#define CONFIG_CMD_UBI /* UBI Support */
145#define CONFIG_CMD_UBIFS /* UBIFS Support */
146#endif
147
148#endif
149
150/* commands not needed from config_cmd_default.h */
151#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
152#undef CONFIG_CMD_IMI /* iminfo */
153#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
154#undef CONFIG_CMD_NFS /* NFS support */
155#undef CONFIG_CMD_SAVEENV /* saveenv */
156#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
157
158#define CONFIG_OMAP3_SPI
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200159#define CONFIG_SYS_I2C
160#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
161#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
162#define CONFIG_SYS_I2C_OMAP34XX
Pali Rohár248ef0a2012-10-29 07:54:01 +0000163
164/*
165 * TWL4030
166 */
167#define CONFIG_TWL4030_POWER
168#define CONFIG_TWL4030_LED
169#define CONFIG_TWL4030_KEYPAD
170
171#define CONFIG_OMAP_GPIO
172#define GPIO_SLIDE 71
173
174/*
175 * Board ONENAND Info.
176 */
177
178#define PART1_NAME "bootloader"
179#define PART1_SIZE 128
180#define PART1_MULL 1024
181#define PART1_SUFF "k"
182#define PART1_OFFS 0x00000000
183#define PART1_MASK 0x00000003
184
185#define PART2_NAME "config"
186#define PART2_SIZE 384
187#define PART2_MULL 1024
188#define PART2_SUFF "k"
189#define PART2_OFFS 0x00020000
190#define PART2_MASK 0x00000000
191
192#define PART3_NAME "log"
193#define PART3_SIZE 256
194#define PART3_MULL 1024
195#define PART3_SUFF "k"
196#define PART3_OFFS 0x00080000
197#define PART3_MASK 0x00000000
198
199#define PART4_NAME "kernel"
200#define PART4_SIZE 2
201#define PART4_MULL 1024*1024
202#define PART4_SUFF "m"
203#define PART4_OFFS 0x000c0000
204#define PART4_MASK 0x00000000
205
206#define PART5_NAME "initfs"
207#define PART5_SIZE 2
208#define PART5_MULL 1024*1024
209#define PART5_SUFF "m"
210#define PART5_OFFS 0x002c0000
211#define PART5_MASK 0x00000000
212
213#define PART6_NAME "rootfs"
214#define PART6_SIZE 257280
215#define PART6_MULL 1024
216#define PART6_SUFF "k"
217#define PART6_OFFS 0x004c0000
218#define PART6_MASK 0x00000000
219
220#ifdef ONENAND_SUPPORT
221
Pali Rohár248ef0a2012-10-29 07:54:01 +0000222#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
223#define CONFIG_MTD_DEVICE
224#define CONFIG_MTD_PARTITIONS
225
226#ifdef UBIFS_SUPPORT
227#define CONFIG_RBTREE
228#define CONFIG_LZO
229#endif
230
231#define MTDIDS_DEFAULT "onenand0=onenand"
232#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
233 __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
234 __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
235 __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
236 __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
237 __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
238 "-(" PART6_NAME ")"
239
240#endif
241
242/* Watchdog support */
243#define CONFIG_HW_WATCHDOG
244
245/*
246 * Framebuffer
247 */
248/* Video console */
249#define CONFIG_VIDEO
250#define CONFIG_CFB_CONSOLE
251#define CONFIG_CFB_CONSOLE_ANSI /* Enable ANSI escape codes in framebuffer */
252#define CONFIG_VIDEO_LOGO
253#define VIDEO_FB_16BPP_PIXEL_SWAP
254#define VIDEO_FB_16BPP_WORD_SWAP
255#define CONFIG_VIDEO_SW_CURSOR
256#define CONFIG_SPLASH_SCREEN
257
258/* functions for cfb_console */
259#define VIDEO_KBD_INIT_FCT rx51_kp_init()
260#define VIDEO_TSTC_FCT rx51_kp_tstc
261#define VIDEO_GETC_FCT rx51_kp_getc
262#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600263struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000264int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600265int rx51_kp_tstc(struct stdio_dev *sdev);
266int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000267#endif
268
269#ifndef MTDPARTS_DEFAULT
270#define MTDPARTS_DEFAULT
271#endif
272
273/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000274#define CONFIG_EXTRA_ENV_SETTINGS \
275 "mtdparts=" MTDPARTS_DEFAULT "\0" \
276 "usbtty=cdc_acm\0" \
277 "stdin=vga\0" \
278 "stdout=vga\0" \
279 "stderr=vga\0" \
280 "setcon=setenv stdin ${con};" \
281 "setenv stdout ${con};" \
282 "setenv stderr ${con}\0" \
283 "sercon=setenv con serial; run setcon\0" \
284 "usbcon=setenv con usbtty; run setcon\0" \
285 "vgacon=setenv con vga; run setcon\0" \
286 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
287 "switchmmc=mmc dev ${mmcnum}\0" \
288 "kernaddr=0x82008000\0" \
289 "initrdaddr=0x84008000\0" \
290 "scriptaddr=0x86008000\0" \
291 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
292 "${loadaddr} ${mmcfile}\0" \
293 "kernload=setenv loadaddr ${kernaddr};" \
294 "setenv mmcfile ${mmckernfile};" \
295 "run fileload\0" \
296 "initrdload=setenv loadaddr ${initrdaddr};" \
297 "setenv mmcfile ${mmcinitrdfile};" \
298 "run fileload\0" \
299 "scriptload=setenv loadaddr ${scriptaddr};" \
300 "setenv mmcfile ${mmcscriptfile};" \
301 "run fileload\0" \
302 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
303 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
304 "kernboot=echo Booting ${mmckernfile} from mmc " \
305 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
306 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
307 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
308 "attachboot=echo Booting attached kernel image ...;" \
309 "setenv setup_omap_atag 1;" \
310 "bootm ${attkernaddr};" \
311 "setenv setup_omap_atag\0" \
312 "trymmcscriptboot=if run switchmmc; then " \
313 "if run scriptload; then " \
314 "run scriptboot;" \
315 "fi;" \
316 "fi\0" \
317 "trymmckernboot=if run switchmmc; then " \
318 "if run kernload; then " \
319 "run kernboot;" \
320 "fi;" \
321 "fi\0" \
322 "trymmckerninitrdboot=if run switchmmc; then " \
323 "if run initrdload; then " \
324 "if run kernload; then " \
325 "run kerninitrdboot;" \
326 "fi;" \
327 "fi; " \
328 "fi\0" \
329 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
330 "setenv mmckernfile uImage; run trymmckernboot\0" \
331 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
332 "setenv mmcpart 2; run trymmcpartboot;" \
333 "setenv mmcpart 3; run trymmcpartboot;" \
334 "setenv mmcpart 4; run trymmcpartboot\0" \
335 "trymmcboot=if run switchmmc; then " \
336 "setenv mmctype fat;" \
337 "run trymmcallpartboot;" \
338 "setenv mmctype ext2;" \
339 "run trymmcallpartboot;" \
340 "setenv mmctype ext4;" \
341 "run trymmcallpartboot;" \
342 "fi\0" \
343 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
344 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000345 "menucmd=bootmenu\0" \
346 "bootmenu_0=Attached kernel=run attachboot\0" \
347 "bootmenu_1=Internal eMMC=run emmcboot\0" \
348 "bootmenu_2=External SD card=run sdboot\0" \
349 "bootmenu_3=U-Boot boot order=boot\0" \
350 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000351 ""
352
353#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000354 "setenv mmcnum 1; setenv mmcpart 1;" \
355 "setenv mmcscriptfile bootmenu.scr;" \
356 "if run switchmmc; then " \
357 "setenv mmcdone true;" \
358 "setenv mmctype fat;" \
359 "if run scriptload; then true; else " \
360 "setenv mmctype ext2;" \
361 "if run scriptload; then true; else " \
362 "setenv mmctype ext4;" \
363 "if run scriptload; then true; else " \
364 "setenv mmcdone false;" \
365 "fi;" \
366 "fi;" \
367 "fi;" \
368 "if ${mmcdone}; then " \
369 "run scriptboot;" \
370 "fi;" \
371 "fi;" \
372 "if run slide; then true; else " \
373 "setenv bootmenu_delay 0;" \
374 "setenv bootdelay 0;" \
375 "fi"
376
377#define CONFIG_POSTBOOTMENU \
378 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000379 "echo Extra commands:;" \
380 "echo run sercon - Use serial port for control.;" \
381 "echo run usbcon - Use usbtty for control.;" \
382 "echo run vgacon - Use framebuffer/keyboard.;" \
383 "echo run sdboot - Boot from SD card slot.;" \
384 "echo run emmcboot - Boot internal eMMC memory.;" \
385 "echo run attachboot - Boot attached kernel image.;" \
386 "echo"
387
388#define CONFIG_BOOTCOMMAND \
389 "run sdboot;" \
390 "run emmcboot;" \
391 "run attachboot;" \
392 "echo"
393
Pali Rohár13eb3e42013-03-07 05:15:19 +0000394#define CONFIG_BOOTDELAY 30
395#define CONFIG_AUTOBOOT_KEYED
396#define CONFIG_MENU
397#define CONFIG_MENU_SHOW
398
Pali Rohár248ef0a2012-10-29 07:54:01 +0000399/*
400 * Miscellaneous configurable options
401 */
402#define CONFIG_SYS_LONGHELP /* undef to save memory */
403#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
404#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
405#define CONFIG_SYS_PROMPT "Nokia RX-51 # "
406#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
407/* Print Buffer Size */
408#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
409 sizeof(CONFIG_SYS_PROMPT) + 16)
410#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
411/* Boot Argument Buffer Size */
412#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
413
414#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
415#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
416
417/* default load address */
418#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
419
420/*
421 * OMAP3 has 12 GP timers, they can be driven by the system clock
422 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
423 * This rate is divided by a local divisor.
424 */
425#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
426#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000427
428/*
429 * Stack sizes
430 *
431 * The stack sizes are set up in start.S using the settings below
432 */
433#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
434
435/*
436 * Physical Memory Map
437 */
438#define CONFIG_NR_DRAM_BANKS 2
439#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
440
441/*
442 * FLASH and environment organization
443 */
444
445#define CONFIG_ENV_IS_NOWHERE
446
447#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
448#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
449#define CONFIG_SYS_INIT_RAM_SIZE 0x800
450#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
451 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
452
453/*
454 * Attached kernel image
455 */
456
457#define SDRAM_SIZE 0x10000000 /* 256 MB */
458#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
459
460#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
461#define KERNEL_OFFSET 0x40000 /* 256 kB */
462#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
463#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
464
465/* Reserve protected RAM for attached kernel */
466#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
467
468#endif /* __CONFIG_H */