| Chris Packham | b55b2c9 | 2019-01-10 21:01:00 +1300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | &i2c0 { |
| 4 | mux@71 { |
| 5 | compatible = "nxp,pca9548"; |
| 6 | |
| 7 | i2c@1 { |
| 8 | hwmon@2c { |
| 9 | compatible = "ti,lm87"; |
| 10 | reg = <0x2c>; |
| 11 | }; |
| 12 | |
| 13 | hwmon@2d { |
| 14 | compatible = "ti,lm87"; |
| 15 | reg = <0x2d>; |
| 16 | }; |
| 17 | |
| 18 | hwmon@2e { |
| 19 | pwm-polarity = <1>; |
| 20 | }; |
| 21 | }; |
| 22 | |
| 23 | psu_a_adapter: i2c@4 { |
| 24 | #address-cells = <1>; |
| 25 | #size-cells = <0>; |
| 26 | reg = <4>; |
| 27 | }; |
| 28 | |
| 29 | psu_b_adapter: i2c@5 { |
| 30 | #address-cells = <1>; |
| 31 | #size-cells = <0>; |
| 32 | reg = <5>; |
| 33 | }; |
| 34 | |
| 35 | i2c@6 { |
| 36 | #address-cells = <1>; |
| 37 | #size-cells = <0>; |
| 38 | reg = <6>; |
| 39 | |
| 40 | misc_gpio: gpio@26 { |
| 41 | compatible = "nxp,pca9555"; |
| 42 | gpio-controller; |
| 43 | #gpio-cells = <2>; |
| 44 | reg = <0x26>; |
| 45 | interrupt-parent = <&gpio0>; |
| 46 | interrupts = <5 IRQ_TYPE_LEVEL_LOW>; |
| 47 | status = "okay"; |
| 48 | interrupt-controller; |
| 49 | #interrupt-cells = <2>; |
| 50 | |
| 51 | psu_bank2 { |
| 52 | gpio-hog; |
| 53 | gpios = <0 GPIO_ACTIVE_HIGH>; |
| 54 | output-high; |
| 55 | line-name = "psu-bank2"; |
| 56 | }; |
| 57 | }; |
| 58 | }; |
| 59 | }; |
| 60 | }; |
| 61 | |
| 62 | / { |
| 63 | psu_slot_a { |
| 64 | compatible = "atl,dts-overlay-gpio-psu-slot"; |
| 65 | slot-name = "PSU Bay A"; |
| 66 | board-index = <1>; |
| 67 | present-gpio = <&misc_gpio 1 GPIO_ACTIVE_LOW>; |
| 68 | output-ok-gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; |
| 69 | interrupt-parent = <&misc_gpio>; |
| 70 | interrupts = <1 IRQ_TYPE_EDGE_BOTH>; |
| 71 | overlay = <&psu_a_overlay>; |
| 72 | }; |
| 73 | |
| 74 | psu_slot_b { |
| 75 | compatible = "atl,dts-overlay-gpio-psu-slot"; |
| 76 | slot-name = "PSU Bay B"; |
| 77 | board-index = <2>; |
| 78 | present-gpio = <&misc_gpio 2 GPIO_ACTIVE_LOW>; |
| 79 | output-ok-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
| 80 | interrupt-parent = <&misc_gpio>; |
| 81 | interrupts = <2 IRQ_TYPE_EDGE_BOTH>; |
| 82 | overlay = <&psu_b_overlay>; |
| 83 | }; |
| 84 | |
| 85 | fan_slot_a { |
| 86 | compatible = "atl,fan05-slot"; |
| 87 | slot-name = "Fan Bay A"; |
| 88 | board-index = <3>; |
| 89 | present-gpio = <&misc_gpio 3 GPIO_ACTIVE_LOW>; |
| 90 | fault-gpio = <&misc_gpio 11 GPIO_ACTIVE_LOW>; |
| 91 | interrupt-parent = <&misc_gpio>; |
| 92 | interrupts = <3 IRQ_TYPE_EDGE_BOTH>; |
| 93 | overlay = <&fan_a_overlay>; |
| 94 | }; |
| 95 | }; |
| 96 | |
| 97 | / { |
| 98 | psu_a_overlay: psu_a { |
| 99 | fragment@0 { |
| 100 | target = <&psu_a_adapter>; |
| 101 | __overlay__ { |
| 102 | #address-cells = <1>; |
| 103 | #size-cells = <0>; |
| 104 | |
| 105 | psu@51 { |
| 106 | compatible = "atl,atl-pwr-gen2"; |
| 107 | reg = <0x51>; |
| 108 | board-index = <1>; |
| 109 | }; |
| 110 | }; |
| 111 | }; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | / { |
| 116 | psu_b_overlay: psu_b { |
| 117 | fragment@0 { |
| 118 | target = <&psu_b_adapter>; |
| 119 | __overlay__ { |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <0>; |
| 122 | |
| 123 | psu@51 { |
| 124 | compatible = "atl,atl-pwr-gen2"; |
| 125 | reg = <0x51>; |
| 126 | board-index = <2>; |
| 127 | }; |
| 128 | }; |
| 129 | }; |
| 130 | }; |
| 131 | }; |
| 132 | |
| 133 | / { |
| 134 | fan_a_overlay:fan_a { |
| 135 | fragment@1 { |
| 136 | target-path = "/"; |
| 137 | __overlay__ { |
| 138 | fan@1 { |
| 139 | compatible = "atl,fan05"; |
| 140 | board-index = <3>; |
| 141 | module-id-gpios = |
| 142 | <&misc_gpio 4 GPIO_ACTIVE_HIGH>, |
| 143 | <&misc_gpio 5 GPIO_ACTIVE_HIGH>, |
| 144 | <&misc_gpio 6 GPIO_ACTIVE_HIGH>; |
| 145 | }; |
| 146 | }; |
| 147 | }; |
| 148 | }; |
| 149 | }; |