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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ilko Iliev8b954a92009-04-16 21:30:48 +02002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Ilko Iliev8b954a92009-04-16 21:30:48 +02005 * Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
7 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ilko Iliev8b954a92009-04-16 21:30:48 +02008 */
9
10#include <common.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070011#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060012#include <asm/global_data.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040013#include <linux/sizes.h>
Asen Dimove1002e22011-06-08 22:01:16 +000014#include <asm/io.h>
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010015#include <asm/gpio.h>
Ilko Iliev8b954a92009-04-16 21:30:48 +020016#include <asm/arch/at91sam9_smc.h>
17#include <asm/arch/at91_common.h>
Ilko Iliev8b954a92009-04-16 21:30:48 +020018#include <asm/arch/at91_rstc.h>
Asen Dimove7480ad2010-04-19 14:18:43 +030019#include <asm/arch/at91_matrix.h>
Ilko Iliev8b954a92009-04-16 21:30:48 +020020#include <asm/arch/clk.h>
Asen Dimove1002e22011-06-08 22:01:16 +000021#include <asm/arch/gpio.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060022#include <asm/mach-types.h>
Ilko Iliev8b954a92009-04-16 21:30:48 +020023
24DECLARE_GLOBAL_DATA_PTR;
25
26/* ------------------------------------------------------------------------- */
27/*
Ilko Ilieva0fe3182021-04-23 15:41:34 +020028 * Miscellaneous platform dependent initializations
Ilko Iliev8b954a92009-04-16 21:30:48 +020029 */
30
31#ifdef CONFIG_CMD_NAND
32static void pm9263_nand_hw_init(void)
33{
34 unsigned long csa;
Asen Dimove1002e22011-06-08 22:01:16 +000035 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC0;
36 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Ilko Iliev8b954a92009-04-16 21:30:48 +020037
38 /* Enable CS3 */
Asen Dimove7480ad2010-04-19 14:18:43 +030039 csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
40 writel(csa, &matrix->csa[0]);
Ilko Iliev8b954a92009-04-16 21:30:48 +020041
42 /* Configure SMC CS3 for NAND/SmartMedia */
Asen Dimove7480ad2010-04-19 14:18:43 +030043 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
44 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
45 &smc->cs[3].setup);
46
47 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
48 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
49 &smc->cs[3].pulse);
50
51 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
52 &smc->cs[3].cycle);
53
54 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
55 AT91_SMC_MODE_EXNW_DISABLE |
Ilko Iliev8b954a92009-04-16 21:30:48 +020056#ifdef CONFIG_SYS_NAND_DBW_16
Asen Dimove7480ad2010-04-19 14:18:43 +030057 AT91_SMC_MODE_DBW_16 |
Ilko Iliev8b954a92009-04-16 21:30:48 +020058#else /* CONFIG_SYS_NAND_DBW_8 */
Asen Dimove7480ad2010-04-19 14:18:43 +030059 AT91_SMC_MODE_DBW_8 |
Ilko Iliev8b954a92009-04-16 21:30:48 +020060#endif
Asen Dimove7480ad2010-04-19 14:18:43 +030061 AT91_SMC_MODE_TDF_CYCLE(2),
62 &smc->cs[3].mode);
Ilko Iliev8b954a92009-04-16 21:30:48 +020063
64 /* Configure RDY/BSY */
Tom Rinib4213492022-11-12 17:36:51 -050065 gpio_direction_input(CFG_SYS_NAND_READY_PIN);
Ilko Iliev8b954a92009-04-16 21:30:48 +020066
67 /* Enable NandFlash */
Tom Rinib4213492022-11-12 17:36:51 -050068 gpio_direction_output(CFG_SYS_NAND_ENABLE_PIN, 1);
Ilko Iliev8b954a92009-04-16 21:30:48 +020069}
70#endif
71
Asen Dimovbd0f0232011-12-09 10:56:55 +000072int board_early_init_f(void)
Ilko Iliev8b954a92009-04-16 21:30:48 +020073{
Asen Dimovbd0f0232011-12-09 10:56:55 +000074 return 0;
75}
76
77int board_init(void)
78{
Ilko Ilieva0fe3182021-04-23 15:41:34 +020079 /* arch number of PM9263 Board */
Asen Dimovbd0f0232011-12-09 10:56:55 +000080 gd->bd->bi_arch_number = MACH_TYPE_PM9263;
81
Ilko Ilieva0fe3182021-04-23 15:41:34 +020082 /* address of boot parameters */
Ilko Iliev8b954a92009-04-16 21:30:48 +020083 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
84
Ilko Iliev8b954a92009-04-16 21:30:48 +020085#ifdef CONFIG_CMD_NAND
86 pm9263_nand_hw_init();
87#endif
Ilko Iliev8b954a92009-04-16 21:30:48 +020088#ifdef CONFIG_USB_OHCI_NEW
89 at91_uhp_hw_init();
90#endif
Ilko Iliev8b954a92009-04-16 21:30:48 +020091 return 0;
92}
93
94int dram_init(void)
95{
Ilko Ilieva0fe3182021-04-23 15:41:34 +020096 /* dram_init must store complete RAM size in gd->ram_size */
Albert ARIBAUDa9606732011-07-03 05:55:33 +000097 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
Asen Dimov84ea97c2010-12-12 12:41:59 +020098 PHYS_SDRAM_SIZE);
99 return 0;
100}
101
Simon Glass2f949c32017-03-31 08:40:32 -0600102int dram_init_banksize(void)
Asen Dimov84ea97c2010-12-12 12:41:59 +0200103{
Ilko Iliev8b954a92009-04-16 21:30:48 +0200104 gd->bd->bi_dram[0].start = PHYS_SDRAM;
105 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
Simon Glass2f949c32017-03-31 08:40:32 -0600106
107 return 0;
Ilko Iliev8b954a92009-04-16 21:30:48 +0200108}
109
Ilko Iliev8b954a92009-04-16 21:30:48 +0200110#ifdef CONFIG_DISPLAY_BOARDINFO
111int checkboard (void)
112{
113 char *ss;
Ilko Iliev8b954a92009-04-16 21:30:48 +0200114
115 printf ("Board : Ronetix PM9263\n");
Ilko Iliev8b954a92009-04-16 21:30:48 +0200116
117 switch (gd->fb_base) {
118 case PHYS_PSRAM:
119 ss = "(PSRAM)";
120 break;
121
Asen Dimove1002e22011-06-08 22:01:16 +0000122 case ATMEL_BASE_SRAM0:
Ilko Iliev8b954a92009-04-16 21:30:48 +0200123 ss = "(Internal SRAM)";
124 break;
125
126 default:
127 ss = "";
128 break;
129 }
130 printf("Video memory : 0x%08lX %s\n", gd->fb_base, ss );
131
132 printf ("\n");
133 return 0;
134}
135#endif