| Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2010-2020 CS Group |
| 4 | * Florent Trinh Thai <florent.trinh-thai@c-s.fr> |
| 5 | * Christophe Leroy <christophe.leroy@c-s.fr> |
| 6 | * Charles Frey <charles.frey@c-s.fr> |
| 7 | */ |
| 8 | |
| 9 | #include <config.h> |
| 10 | #include <common.h> |
| 11 | #include <nand.h> |
| 12 | #include <linux/bitops.h> |
| 13 | #include <linux/mtd/rawnand.h> |
| 14 | #include <asm/io.h> |
| 15 | |
| 16 | #define BIT_CLE BIT(3) |
| 17 | #define BIT_ALE BIT(2) |
| 18 | #define BIT_NCE BIT(0) |
| 19 | |
| 20 | static u32 nand_mask(unsigned int ctrl) |
| 21 | { |
| 22 | return ((ctrl & NAND_CLE) ? BIT_CLE : 0) | |
| 23 | ((ctrl & NAND_ALE) ? BIT_ALE : 0) | |
| 24 | (!(ctrl & NAND_NCE) ? BIT_NCE : 0); |
| 25 | } |
| 26 | |
| 27 | static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl) |
| 28 | { |
| 29 | immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 30 | struct nand_chip *chip = mtd_to_nand(mtdinfo); |
| 31 | |
| 32 | if (ctrl & NAND_CTRL_CHANGE) |
| 33 | clrsetbits_be16(&immr->im_ioport.iop_pddat, |
| 34 | BIT_CLE | BIT_ALE | BIT_NCE, nand_mask(ctrl)); |
| 35 | |
| 36 | if (cmd != NAND_CMD_NONE) |
| 37 | out_8(chip->IO_ADDR_W, cmd); |
| 38 | } |
| 39 | |
| 40 | int board_nand_init(struct nand_chip *chip) |
| 41 | { |
| 42 | chip->chip_delay = 60; |
| 43 | chip->ecc.mode = NAND_ECC_SOFT; |
| 44 | chip->cmd_ctrl = nand_hwcontrol; |
| 45 | |
| 46 | return 0; |
| 47 | } |