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git01.mediatek.com / filogic / uboot / 57da66691afba2ac54e3f344c76714cbb9f4cc45 / . / arch / arm / cpu / arm1136 / mx35 / asm-offsets.c
blob: 26e14da192dddb13bc7fc9262b7ca74bcf2decbc [file] [log] [blame]
Stefano Babic1c2b3ac2011-01-20 07:49:52 +0000[diff] [blame]1/*
2 * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
3 *
4 * This program is used to generate definitions needed by
5 * assembly language modules.
6 *
7 * We use the technique used in the OSF Mach kernel code:
8 * generate asm statements containing #defines,
9 * compile this file to assembler, and then extract the
10 * #defines from the assembly-language output.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <common.h>
19#include <asm/arch/imx-regs.h>
20
21#include <linux/kbuild.h>
22
23int main(void)
24{
Stefano Babic1c2b3ac2011-01-20 07:49:52 +0000[diff] [blame]25 /* Round up to make sure size gives nice stack alignment */
26 DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
27 DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
28 DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
29 DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
30 DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
31 DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
32 DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
33 DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
34 DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
35 DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
36 DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
37 DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
38 DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
39 DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
Benoît Thébaudeaubc17d2e2012-08-14 11:03:59 +0000[diff] [blame]40 DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
41
42 /* Multi-Layer AHB Crossbar Switch */
43 DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
44 DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
45 DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
46 DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
47 DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
48 DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
49 DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
50 DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
51 DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
52 DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
53 DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
54 DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
55 DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
56 DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
57 DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
58 DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
59
60 /* AHB <-> IP-Bus Interface */
61 DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
62 DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
63 DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
64 DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
65 DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
66 DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
67 DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
68 DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
69 DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
70 DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
71 DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
Stefano Babic1c2b3ac2011-01-20 07:49:52 +0000[diff] [blame]72
73 return 0;
74}