wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 1998-2001 by Donald Becker. |
| 3 | * This software may be used and distributed according to the terms of |
| 4 | * the GNU General Public License (GPL), incorporated herein by reference. |
| 5 | * Contact the author for use under other terms. |
| 6 | * |
| 7 | * This program must be compiled with "-O"! |
| 8 | * See the bottom of this file for the suggested compile-command. |
| 9 | * |
| 10 | * The author may be reached as becker@scyld.com, or C/O |
| 11 | * Scyld Computing Corporation |
| 12 | * 410 Severn Ave., Suite 210 |
| 13 | * Annapolis MD 21403 |
| 14 | * |
| 15 | * Common-sense licensing statement: Using any portion of this program in |
| 16 | * your own program means that you must give credit to the original author |
| 17 | * and release the resulting code under the GPL. |
| 18 | */ |
| 19 | |
| 20 | #define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 21 | #define _LINUX_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | #include <syscall.h> |
| 25 | |
| 26 | static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr); |
| 27 | |
| 28 | int eepro100_eeprom(void) |
| 29 | { |
| 30 | int ret = 0; |
| 31 | |
| 32 | unsigned char hwaddr1[6] = { 0x00, 0x00, 0x02, 0x03, 0x04, 0x05 }; |
| 33 | unsigned char hwaddr2[6] = { 0x00, 0x00, 0x02, 0x03, 0x04, 0x06 }; |
| 34 | |
| 35 | #if defined(CONFIG_OXC) |
| 36 | ret |= reset_eeprom(0x80000000, hwaddr1); |
| 37 | ret |= reset_eeprom(0x81000000, hwaddr2); |
| 38 | #endif |
| 39 | |
| 40 | return ret; |
| 41 | } |
| 42 | |
| 43 | /* Default EEPROM for i82559 */ |
| 44 | static unsigned short default_eeprom[64] = { |
| 45 | 0x0100, 0x0302, 0x0504, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 46 | 0xffff, 0xffff, 0x40c0, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, |
| 47 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 48 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 49 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 50 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 51 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 52 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff |
| 53 | }; |
| 54 | |
| 55 | static unsigned short eeprom[256]; |
| 56 | |
| 57 | static int eeprom_size = 64; |
| 58 | static int eeprom_addr_size = 6; |
| 59 | |
| 60 | static int debug = 0; |
| 61 | |
| 62 | static inline unsigned short swap16(unsigned short x) |
| 63 | { |
| 64 | return (((x & 0xff) << 8) | ((x & 0xff00) >> 8)); |
| 65 | } |
| 66 | |
| 67 | static inline void outw(short data, long addr) |
| 68 | { |
| 69 | *(volatile short *)(addr) = swap16(data); |
| 70 | } |
| 71 | |
| 72 | static inline short inw(long addr) |
| 73 | { |
| 74 | return swap16(*(volatile short *)(addr)); |
| 75 | } |
| 76 | |
| 77 | static inline void *memcpy(void *dst, const void *src, unsigned int len) |
| 78 | { |
| 79 | void * ret = dst; |
| 80 | while (len-- > 0) *((char *)dst)++ = *((char *)src)++; |
| 81 | return ret; |
| 82 | } |
| 83 | |
| 84 | /* The EEPROM commands include the alway-set leading bit. */ |
| 85 | #define EE_WRITE_CMD (5) |
| 86 | #define EE_READ_CMD (6) |
| 87 | #define EE_ERASE_CMD (7) |
| 88 | |
| 89 | /* Serial EEPROM section. */ |
| 90 | #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ |
| 91 | #define EE_CS 0x02 /* EEPROM chip select. */ |
| 92 | #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ |
| 93 | #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ |
| 94 | #define EE_ENB (0x4800 | EE_CS) |
| 95 | #define EE_WRITE_0 0x4802 |
| 96 | #define EE_WRITE_1 0x4806 |
| 97 | #define EE_OFFSET 14 |
| 98 | |
| 99 | /* Delay between EEPROM clock transitions. */ |
| 100 | #define eeprom_delay(ee_addr) inw(ee_addr) |
| 101 | |
| 102 | /* Wait for the EEPROM to finish the previous operation. */ |
| 103 | static int eeprom_busy_poll(long ee_ioaddr) |
| 104 | { |
| 105 | int i; |
| 106 | outw(EE_ENB, ee_ioaddr); |
| 107 | for (i = 0; i < 10000; i++) /* Typical 2000 ticks */ |
| 108 | if (inw(ee_ioaddr) & EE_DATA_READ) |
| 109 | break; |
| 110 | return i; |
| 111 | } |
| 112 | |
| 113 | /* This executes a generic EEPROM command, typically a write or write enable. |
| 114 | It returns the data output from the EEPROM, and thus may also be used for |
| 115 | reads. */ |
| 116 | static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len) |
| 117 | { |
| 118 | unsigned retval = 0; |
| 119 | long ee_addr = ioaddr + EE_OFFSET; |
| 120 | |
| 121 | if (debug > 1) |
| 122 | mon_printf(" EEPROM op 0x%x: ", cmd); |
| 123 | |
| 124 | outw(EE_ENB | EE_SHIFT_CLK, ee_addr); |
| 125 | |
| 126 | /* Shift the command bits out. */ |
| 127 | do { |
| 128 | short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; |
| 129 | outw(dataval, ee_addr); |
| 130 | eeprom_delay(ee_addr); |
| 131 | if (debug > 2) |
| 132 | mon_printf("%X", inw(ee_addr) & 15); |
| 133 | outw(dataval | EE_SHIFT_CLK, ee_addr); |
| 134 | eeprom_delay(ee_addr); |
| 135 | retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0); |
| 136 | } while (--cmd_len >= 0); |
| 137 | #if 0 |
| 138 | outw(EE_ENB, ee_addr); |
| 139 | #endif |
| 140 | /* Terminate the EEPROM access. */ |
| 141 | outw(EE_ENB & ~EE_CS, ee_addr); |
| 142 | if (debug > 1) |
| 143 | mon_printf(" EEPROM result is 0x%5.5x.\n", retval); |
| 144 | return retval; |
| 145 | } |
| 146 | |
| 147 | static int read_eeprom(long ioaddr, int location, int addr_len) |
| 148 | { |
| 149 | return do_eeprom_cmd(ioaddr, ((EE_READ_CMD << addr_len) | location) |
| 150 | << 16 , 3 + addr_len + 16) & 0xffff; |
| 151 | } |
| 152 | |
| 153 | static void write_eeprom(long ioaddr, int index, int value, int addr_len) |
| 154 | { |
| 155 | long ee_ioaddr = ioaddr + EE_OFFSET; |
| 156 | int i; |
| 157 | |
| 158 | /* Poll for previous op finished. */ |
| 159 | eeprom_busy_poll(ee_ioaddr); /* Typical 0 ticks */ |
| 160 | /* Enable programming modes. */ |
| 161 | do_eeprom_cmd(ioaddr, (0x4f << (addr_len-4)), 3 + addr_len); |
| 162 | /* Do the actual write. */ |
| 163 | do_eeprom_cmd(ioaddr, |
| 164 | (((EE_WRITE_CMD<<addr_len) | index)<<16) | (value & 0xffff), |
| 165 | 3 + addr_len + 16); |
| 166 | /* Poll for write finished. */ |
| 167 | i = eeprom_busy_poll(ee_ioaddr); /* Typical 2000 ticks */ |
| 168 | if (debug) |
| 169 | mon_printf(" Write finished after %d ticks.\n", i); |
| 170 | /* Disable programming. This command is not instantaneous, so we check |
| 171 | for busy before the next op. */ |
| 172 | do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len); |
| 173 | eeprom_busy_poll(ee_ioaddr); |
| 174 | } |
| 175 | |
| 176 | static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr) |
| 177 | { |
| 178 | unsigned short checksum = 0; |
| 179 | int size_test; |
| 180 | int i; |
| 181 | |
| 182 | mon_printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr); |
| 183 | |
| 184 | size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27); |
| 185 | eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6; |
| 186 | eeprom_size = 1 << eeprom_addr_size; |
| 187 | |
| 188 | memcpy(eeprom, default_eeprom, sizeof default_eeprom); |
| 189 | |
| 190 | for (i = 0; i < 3; i++) |
| 191 | eeprom[i] = (hwaddr[i*2+1]<<8) + hwaddr[i*2]; |
| 192 | |
| 193 | /* Recalculate the checksum. */ |
| 194 | for (i = 0; i < eeprom_size - 1; i++) |
| 195 | checksum += eeprom[i]; |
| 196 | eeprom[i] = 0xBABA - checksum; |
| 197 | |
| 198 | for (i = 0; i < eeprom_size; i++) |
| 199 | write_eeprom(ioaddr, i, eeprom[i], eeprom_addr_size); |
| 200 | |
| 201 | for (i = 0; i < eeprom_size; i++) |
| 202 | if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) { |
| 203 | mon_printf("failed\n"); |
| 204 | return 1; |
| 205 | } |
| 206 | |
| 207 | mon_printf("done\n"); |
| 208 | return 0; |
| 209 | } |