| wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* now setup the General purpose bus to give us access to the LEDs. |
| 25 | * We can then use the leds to display status information. |
| wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame^] | 26 | */ |
| wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 27 | |
| 28 | sc520_cdp_registers: |
| 29 | /* size offset value */ |
| 30 | .word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */ |
| 31 | .word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */ |
| 32 | .word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */ |
| 33 | .word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */ |
| 34 | .word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */ |
| 35 | .word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */ |
| 36 | .word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */ |
| 37 | .word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */ |
| 38 | .word 2 ; .word 0xc2c ; .long 0x0000 /* GPIO directionreg */ |
| 39 | .word 2 ; .word 0xc2a ; .long 0x0000 /* GPIO directionreg */ |
| 40 | .word 2 ; .word 0xc22 ; .long 0xffff /* GPIO pin function 31-16 reg */ |
| 41 | .word 2 ; .word 0xc20 ; .long 0xffff /* GPIO pin function 15-0 reg */ |
| 42 | .word 2 ; .word 0x0c4 ; .long 0x28000680 /* PAR 15 for access to led 680 */ |
| 43 | .word 0 ; .word 0x000 ; .long 0x00 |
| 44 | |
| 45 | /* board early intialization */ |
| 46 | .globl early_board_init |
| 47 | early_board_init: |
| wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame^] | 48 | movl $sc520_cdp_registers,%esi |
| 49 | init_loop: |
| 50 | movl $0xfffef000,%edi /* MMCR base to edi */ |
| wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 51 | movw (%esi), %bx /* load sizer to bx */ |
| 52 | cmpw $0, %bx /* if sie is 0 we're done */ |
| wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame^] | 53 | je done |
| wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 54 | xorl %edx,%edx |
| 55 | movw 2(%esi), %dx /* load MMCR offset to dx */ |
| 56 | addl %edx, %edi /* add offset to base in edi */ |
| 57 | movl 4(%esi), %eax /* load value in eax */ |
| 58 | cmpw $1, %bx |
| 59 | je byte /* byte op? */ |
| 60 | cmpw $2, %bx |
| 61 | je word /* word op? */ |
| 62 | movl %eax, (%edi) /* must be long, then */ |
| 63 | jmp next |
| wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame^] | 64 | byte: movb %al,(%edi) |
| wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 65 | jmp next |
| 66 | word: movw %ax,(%edi) |
| 67 | next: addl $8, %esi /* advance esi */ |
| 68 | jmp init_loop |
| 69 | |
| 70 | /* the leds ad 0x80 and 0x680 should now work */ |
| 71 | done: movb $0x88, %al |
| 72 | out %al, $0x80 |
| 73 | movw $0x680, %dx |
| 74 | out %al, %dx |
| 75 | |
| 76 | jmp *%ebp /* return to caller */ |
| 77 | |
| 78 | |
| 79 | .globl __show_boot_progress |
| 80 | __show_boot_progress: |
| 81 | out %al, $0x80 |
| 82 | xchg %al, %ah |
| 83 | movw $0x680, %dx |
| 84 | out %al, %dx |
| 85 | jmp *%ebp |