blob: 9801773eb7e844625099e88ea96b89e3a6343d26 [file] [log] [blame]
wdenkf9087a32002-11-03 00:30:25 +00001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
wdenk384ae022002-11-05 00:17:55 +00009 * (C) Copyright 2002
wdenk57b2d802003-06-27 21:31:46 +000010 * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
wdenk384ae022002-11-05 00:17:55 +000011 *
wdenkf9087a32002-11-03 00:30:25 +000012 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
wdenk384ae022002-11-05 00:17:55 +000032#include <asm/arch/pxa-regs.h>
wdenkf9087a32002-11-03 00:30:25 +000033
34#define FLASH_BANK_SIZE 0x02000000
35#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
36
37flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
38
39
wdenk384ae022002-11-05 00:17:55 +000040/**
41 * flash_init: - initialize data structures for flash chips
42 *
43 * @return: size of the flash
wdenkf9087a32002-11-03 00:30:25 +000044 */
45
46ulong flash_init(void)
47{
wdenkcc1e2562003-03-06 13:39:27 +000048 int i, j;
49 ulong size = 0;
wdenkf9087a32002-11-03 00:30:25 +000050
wdenk384ae022002-11-05 00:17:55 +000051 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
wdenkcc1e2562003-03-06 13:39:27 +000052 ulong flashbase = 0;
53 flash_info[i].flash_id =
54 (INTEL_MANUFACT & FLASH_VENDMASK) |
55 (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
56 flash_info[i].size = FLASH_BANK_SIZE;
57 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
58 memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
wdenkf9087a32002-11-03 00:30:25 +000059
wdenk384ae022002-11-05 00:17:55 +000060 switch (i) {
wdenkcc1e2562003-03-06 13:39:27 +000061 case 0:
62 flashbase = PHYS_FLASH_1;
63 break;
64 default:
65 panic("configured to many flash banks!\n");
66 break;
67 }
wdenk384ae022002-11-05 00:17:55 +000068 for (j = 0; j < flash_info[i].sector_count; j++) {
wdenkcc1e2562003-03-06 13:39:27 +000069 flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
70 }
71 size += flash_info[i].size;
wdenkf9087a32002-11-03 00:30:25 +000072 }
wdenkf9087a32002-11-03 00:30:25 +000073
wdenk384ae022002-11-05 00:17:55 +000074 /* Protect monitor and environment sectors */
wdenkcc1e2562003-03-06 13:39:27 +000075 flash_protect(FLAG_PROTECT_SET,
76 CFG_FLASH_BASE,
wdenkb9a83a92003-05-30 12:48:29 +000077 CFG_FLASH_BASE + monitor_flash_len - 1,
wdenkcc1e2562003-03-06 13:39:27 +000078 &flash_info[0]);
wdenkf9087a32002-11-03 00:30:25 +000079
wdenkcc1e2562003-03-06 13:39:27 +000080 flash_protect(FLAG_PROTECT_SET,
81 CFG_ENV_ADDR,
82 CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
83 &flash_info[0]);
wdenkf9087a32002-11-03 00:30:25 +000084
wdenkcc1e2562003-03-06 13:39:27 +000085 return size;
wdenkf9087a32002-11-03 00:30:25 +000086}
87
wdenk384ae022002-11-05 00:17:55 +000088
89/**
90 * flash_print_info: - print information about the flash situation
91 *
wdenk57b2d802003-06-27 21:31:46 +000092 * @param info:
wdenkf9087a32002-11-03 00:30:25 +000093 */
wdenk384ae022002-11-05 00:17:55 +000094
wdenkf9087a32002-11-03 00:30:25 +000095void flash_print_info (flash_info_t *info)
96{
wdenkcc1e2562003-03-06 13:39:27 +000097 int i, j;
wdenkf9087a32002-11-03 00:30:25 +000098
wdenk384ae022002-11-05 00:17:55 +000099 for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
100
101 switch (info->flash_id & FLASH_VENDMASK) {
102
wdenkcc1e2562003-03-06 13:39:27 +0000103 case (INTEL_MANUFACT & FLASH_VENDMASK):
104 printf("Intel: ");
105 break;
106 default:
107 printf("Unknown Vendor ");
108 break;
109 }
wdenkf9087a32002-11-03 00:30:25 +0000110
wdenk384ae022002-11-05 00:17:55 +0000111 switch (info->flash_id & FLASH_TYPEMASK) {
112
wdenkcc1e2562003-03-06 13:39:27 +0000113 case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
114 printf("28F128J3 (128Mbit)\n");
115 break;
116 default:
117 printf("Unknown Chip Type\n");
wdenk384ae022002-11-05 00:17:55 +0000118 return;
wdenkcc1e2562003-03-06 13:39:27 +0000119 }
wdenkf9087a32002-11-03 00:30:25 +0000120
wdenk57b2d802003-06-27 21:31:46 +0000121 printf(" Size: %ld MB in %d Sectors\n",
wdenkcc1e2562003-03-06 13:39:27 +0000122 info->size >> 20, info->sector_count);
wdenkf9087a32002-11-03 00:30:25 +0000123
wdenkcc1e2562003-03-06 13:39:27 +0000124 printf(" Sector Start Addresses:");
wdenk384ae022002-11-05 00:17:55 +0000125 for (i = 0; i < info->sector_count; i++) {
126 if ((i % 5) == 0) printf ("\n ");
wdenk57b2d802003-06-27 21:31:46 +0000127
wdenkcc1e2562003-03-06 13:39:27 +0000128 printf (" %08lX%s", info->start[i],
129 info->protect[i] ? " (RO)" : " ");
130 }
131 printf ("\n");
132 info++;
133 }
wdenkf9087a32002-11-03 00:30:25 +0000134}
135
wdenk384ae022002-11-05 00:17:55 +0000136
137/**
138 * flash_erase: - erase flash sectors
139 *
wdenkf9087a32002-11-03 00:30:25 +0000140 */
141
wdenkcc1e2562003-03-06 13:39:27 +0000142int flash_erase(flash_info_t *info, int s_first, int s_last)
wdenkf9087a32002-11-03 00:30:25 +0000143{
wdenkcc1e2562003-03-06 13:39:27 +0000144 int flag, prot, sect;
145 int rc = ERR_OK;
wdenkf9087a32002-11-03 00:30:25 +0000146
wdenkcc1e2562003-03-06 13:39:27 +0000147 if (info->flash_id == FLASH_UNKNOWN)
148 return ERR_UNKNOWN_FLASH_TYPE;
wdenkf9087a32002-11-03 00:30:25 +0000149
wdenkcc1e2562003-03-06 13:39:27 +0000150 if ((s_first < 0) || (s_first > s_last)) {
151 return ERR_INVAL;
152 }
wdenkf9087a32002-11-03 00:30:25 +0000153
wdenk384ae022002-11-05 00:17:55 +0000154 if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
wdenkcc1e2562003-03-06 13:39:27 +0000155 return ERR_UNKNOWN_FLASH_VENDOR;
wdenk57b2d802003-06-27 21:31:46 +0000156
wdenkcc1e2562003-03-06 13:39:27 +0000157 prot = 0;
158 for (sect=s_first; sect<=s_last; ++sect) {
wdenk384ae022002-11-05 00:17:55 +0000159 if (info->protect[sect]) prot++;
wdenkf9087a32002-11-03 00:30:25 +0000160 }
wdenk384ae022002-11-05 00:17:55 +0000161
162 if (prot) return ERR_PROTECTED;
wdenkf9087a32002-11-03 00:30:25 +0000163
wdenkcc1e2562003-03-06 13:39:27 +0000164 /*
165 * Disable interrupts which might cause a timeout
166 * here. Remember that our exception vectors are
167 * at address 0 in the flash, and we don't want a
168 * (ticker) exception to happen while the flash
169 * chip is in programming mode.
170 */
wdenkf9087a32002-11-03 00:30:25 +0000171
wdenkcc1e2562003-03-06 13:39:27 +0000172 flag = disable_interrupts();
wdenkf9087a32002-11-03 00:30:25 +0000173
wdenkcc1e2562003-03-06 13:39:27 +0000174 /* Start erase on unprotected sectors */
175 for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
wdenkf9087a32002-11-03 00:30:25 +0000176
wdenkcc1e2562003-03-06 13:39:27 +0000177 printf("Erasing sector %2d ... ", sect);
wdenkf9087a32002-11-03 00:30:25 +0000178
wdenkcc1e2562003-03-06 13:39:27 +0000179 /* arm simple, non interrupt dependent timer */
180 reset_timer_masked();
181
182 if (info->protect[sect] == 0) { /* not protected */
wdenk384ae022002-11-05 00:17:55 +0000183 u32 * volatile addr = (u32 * volatile)(info->start[sect]);
wdenkf9087a32002-11-03 00:30:25 +0000184
wdenk384ae022002-11-05 00:17:55 +0000185 /* erase sector: */
186 /* The strata flashs are aligned side by side on */
187 /* the data bus, so we have to write the commands */
188 /* to both chips here: */
wdenkf9087a32002-11-03 00:30:25 +0000189
wdenk384ae022002-11-05 00:17:55 +0000190 *addr = 0x00200020; /* erase setup */
191 *addr = 0x00D000D0; /* erase confirm */
192
193 while ((*addr & 0x00800080) != 0x00800080) {
wdenkcc1e2562003-03-06 13:39:27 +0000194 if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
wdenk384ae022002-11-05 00:17:55 +0000195 *addr = 0x00B000B0; /* suspend erase*/
196 *addr = 0x00FF00FF; /* read mode */
wdenkcc1e2562003-03-06 13:39:27 +0000197 rc = ERR_TIMOUT;
198 goto outahere;
199 }
200 }
wdenkf9087a32002-11-03 00:30:25 +0000201
wdenk384ae022002-11-05 00:17:55 +0000202 *addr = 0x00500050; /* clear status register cmd. */
203 *addr = 0x00FF00FF; /* resest to read mode */
204
wdenkcc1e2562003-03-06 13:39:27 +0000205 }
wdenk57b2d802003-06-27 21:31:46 +0000206
wdenkcc1e2562003-03-06 13:39:27 +0000207 printf("ok.\n");
208 }
wdenk384ae022002-11-05 00:17:55 +0000209
210 if (ctrlc()) printf("User Interrupt!\n");
wdenkf9087a32002-11-03 00:30:25 +0000211
wdenkcc1e2562003-03-06 13:39:27 +0000212 outahere:
wdenkf9087a32002-11-03 00:30:25 +0000213
wdenkcc1e2562003-03-06 13:39:27 +0000214 /* allow flash to settle - wait 10 ms */
215 udelay_masked(10000);
wdenkf9087a32002-11-03 00:30:25 +0000216
wdenk384ae022002-11-05 00:17:55 +0000217 if (flag) enable_interrupts();
wdenkf9087a32002-11-03 00:30:25 +0000218
wdenkcc1e2562003-03-06 13:39:27 +0000219 return rc;
wdenkf9087a32002-11-03 00:30:25 +0000220}
221
wdenk384ae022002-11-05 00:17:55 +0000222
223/**
224 * write_word: - copy memory to flash
wdenk57b2d802003-06-27 21:31:46 +0000225 *
wdenk384ae022002-11-05 00:17:55 +0000226 * @param info:
227 * @param dest:
wdenk57b2d802003-06-27 21:31:46 +0000228 * @param data:
wdenk384ae022002-11-05 00:17:55 +0000229 * @return:
wdenkf9087a32002-11-03 00:30:25 +0000230 */
231
232static int write_word (flash_info_t *info, ulong dest, ushort data)
233{
wdenkcc1e2562003-03-06 13:39:27 +0000234 u32 * volatile addr = (u32 * volatile)dest, val;
235 int rc = ERR_OK;
236 int flag;
wdenkf9087a32002-11-03 00:30:25 +0000237
wdenk384ae022002-11-05 00:17:55 +0000238 /* Check if Flash is (sufficiently) erased */
239 if ((*addr & data) != data) return ERR_NOT_ERASED;
wdenkf9087a32002-11-03 00:30:25 +0000240
wdenkcc1e2562003-03-06 13:39:27 +0000241 /*
242 * Disable interrupts which might cause a timeout
243 * here. Remember that our exception vectors are
244 * at address 0 in the flash, and we don't want a
245 * (ticker) exception to happen while the flash
246 * chip is in programming mode.
247 */
248 flag = disable_interrupts();
wdenkf9087a32002-11-03 00:30:25 +0000249
wdenkcc1e2562003-03-06 13:39:27 +0000250 /* clear status register command */
251 *addr = 0x50;
wdenkf9087a32002-11-03 00:30:25 +0000252
wdenkcc1e2562003-03-06 13:39:27 +0000253 /* program set-up command */
254 *addr = 0x40;
wdenkf9087a32002-11-03 00:30:25 +0000255
wdenkcc1e2562003-03-06 13:39:27 +0000256 /* latch address/data */
257 *addr = data;
wdenkf9087a32002-11-03 00:30:25 +0000258
wdenkcc1e2562003-03-06 13:39:27 +0000259 /* arm simple, non interrupt dependent timer */
260 reset_timer_masked();
wdenkf9087a32002-11-03 00:30:25 +0000261
wdenkcc1e2562003-03-06 13:39:27 +0000262 /* wait while polling the status register */
wdenk384ae022002-11-05 00:17:55 +0000263 while(((val = *addr) & 0x80) != 0x80) {
wdenkcc1e2562003-03-06 13:39:27 +0000264 if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
265 rc = ERR_TIMOUT;
wdenk384ae022002-11-05 00:17:55 +0000266 *addr = 0xB0; /* suspend program command */
wdenkcc1e2562003-03-06 13:39:27 +0000267 goto outahere;
268 }
wdenkf9087a32002-11-03 00:30:25 +0000269 }
wdenkf9087a32002-11-03 00:30:25 +0000270
wdenkcc1e2562003-03-06 13:39:27 +0000271 if(val & 0x1A) { /* check for error */
272 printf("\nFlash write error %02x at address %08lx\n",
273 (int)val, (unsigned long)dest);
274 if(val & (1<<3)) {
275 printf("Voltage range error.\n");
276 rc = ERR_PROG_ERROR;
277 goto outahere;
278 }
279 if(val & (1<<1)) {
280 printf("Device protect error.\n");
281 rc = ERR_PROTECTED;
282 goto outahere;
283 }
284 if(val & (1<<4)) {
285 printf("Programming error.\n");
286 rc = ERR_PROG_ERROR;
287 goto outahere;
288 }
289 rc = ERR_PROG_ERROR;
290 goto outahere;
291 }
wdenkf9087a32002-11-03 00:30:25 +0000292
wdenkcc1e2562003-03-06 13:39:27 +0000293 outahere:
wdenkf9087a32002-11-03 00:30:25 +0000294
wdenk384ae022002-11-05 00:17:55 +0000295 *addr = 0xFF; /* read array command */
296 if (flag) enable_interrupts();
wdenkf9087a32002-11-03 00:30:25 +0000297
wdenkcc1e2562003-03-06 13:39:27 +0000298 return rc;
wdenkf9087a32002-11-03 00:30:25 +0000299}
300
wdenk384ae022002-11-05 00:17:55 +0000301
302/**
303 * write_buf: - Copy memory to flash.
wdenk57b2d802003-06-27 21:31:46 +0000304 *
305 * @param info:
wdenk384ae022002-11-05 00:17:55 +0000306 * @param src: source of copy transaction
307 * @param addr: where to copy to
308 * @param cnt: number of bytes to copy
309 *
310 * @return error code
wdenkf9087a32002-11-03 00:30:25 +0000311 */
312
313int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
314{
wdenkcc1e2562003-03-06 13:39:27 +0000315 ulong cp, wp;
316 ushort data;
317 int l;
318 int i, rc;
wdenkf9087a32002-11-03 00:30:25 +0000319
wdenkcc1e2562003-03-06 13:39:27 +0000320 wp = (addr & ~1); /* get lower word aligned address */
wdenkf9087a32002-11-03 00:30:25 +0000321
wdenkcc1e2562003-03-06 13:39:27 +0000322 /*
323 * handle unaligned start bytes
324 */
325 if ((l = addr - wp) != 0) {
326 data = 0;
327 for (i=0, cp=wp; i<l; ++i, ++cp) {
328 data = (data >> 8) | (*(uchar *)cp << 8);
329 }
330 for (; i<2 && cnt>0; ++i) {
331 data = (data >> 8) | (*src++ << 8);
332 --cnt;
333 ++cp;
334 }
335 for (; cnt==0 && i<2; ++i, ++cp) {
336 data = (data >> 8) | (*(uchar *)cp << 8);
337 }
wdenkf9087a32002-11-03 00:30:25 +0000338
wdenkcc1e2562003-03-06 13:39:27 +0000339 if ((rc = write_word(info, wp, data)) != 0) {
340 return (rc);
341 }
342 wp += 2;
wdenkf9087a32002-11-03 00:30:25 +0000343 }
wdenkf9087a32002-11-03 00:30:25 +0000344
wdenkcc1e2562003-03-06 13:39:27 +0000345 /*
346 * handle word aligned part
347 */
348 while (cnt >= 2) {
349 /* data = *((vushort*)src); */
350 data = *((ushort*)src);
351 if ((rc = write_word(info, wp, data)) != 0) {
352 return (rc);
353 }
354 src += 2;
355 wp += 2;
356 cnt -= 2;
wdenkf9087a32002-11-03 00:30:25 +0000357 }
wdenkf9087a32002-11-03 00:30:25 +0000358
wdenk384ae022002-11-05 00:17:55 +0000359 if (cnt == 0) return ERR_OK;
wdenkf9087a32002-11-03 00:30:25 +0000360
wdenkcc1e2562003-03-06 13:39:27 +0000361 /*
362 * handle unaligned tail bytes
363 */
364 data = 0;
365 for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
366 data = (data >> 8) | (*src++ << 8);
367 --cnt;
368 }
369 for (; i<2; ++i, ++cp) {
370 data = (data >> 8) | (*(uchar *)cp << 8);
371 }
wdenkf9087a32002-11-03 00:30:25 +0000372
wdenkcc1e2562003-03-06 13:39:27 +0000373 return write_word(info, wp, data);
wdenkf9087a32002-11-03 00:30:25 +0000374}