Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
maxims@google.com | 750875c | 2017-04-17 12:00:24 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2017 Google, Inc |
maxims@google.com | 750875c | 2017-04-17 12:00:24 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
maxims@google.com | 750875c | 2017-04-17 12:00:24 -0700 | [diff] [blame] | 9 | #include <misc.h> |
| 10 | #include <reset.h> |
| 11 | #include <reset-uclass.h> |
| 12 | #include <wdt.h> |
| 13 | #include <asm/io.h> |
| 14 | #include <asm/arch/scu_ast2500.h> |
| 15 | #include <asm/arch/wdt.h> |
| 16 | |
maxims@google.com | 750875c | 2017-04-17 12:00:24 -0700 | [diff] [blame] | 17 | struct ast2500_reset_priv { |
| 18 | /* WDT used to perform resets. */ |
| 19 | struct udevice *wdt; |
| 20 | struct ast2500_scu *scu; |
| 21 | }; |
| 22 | |
| 23 | static int ast2500_ofdata_to_platdata(struct udevice *dev) |
| 24 | { |
| 25 | struct ast2500_reset_priv *priv = dev_get_priv(dev); |
| 26 | int ret; |
| 27 | |
| 28 | ret = uclass_get_device_by_phandle(UCLASS_WDT, dev, "aspeed,wdt", |
| 29 | &priv->wdt); |
| 30 | if (ret) { |
| 31 | debug("%s: can't find WDT for reset controller", __func__); |
| 32 | return ret; |
| 33 | } |
| 34 | |
| 35 | return 0; |
| 36 | } |
| 37 | |
| 38 | static int ast2500_reset_assert(struct reset_ctl *reset_ctl) |
| 39 | { |
| 40 | struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev); |
| 41 | u32 reset_mode, reset_mask; |
| 42 | bool reset_sdram; |
| 43 | int ret; |
| 44 | |
| 45 | /* |
| 46 | * To reset SDRAM, a specifal flag in SYSRESET register |
| 47 | * needs to be enabled first |
| 48 | */ |
| 49 | reset_mode = ast_reset_mode_from_flags(reset_ctl->id); |
| 50 | reset_mask = ast_reset_mask_from_flags(reset_ctl->id); |
| 51 | reset_sdram = reset_mode == WDT_CTRL_RESET_SOC && |
| 52 | (reset_mask & WDT_RESET_SDRAM); |
| 53 | |
| 54 | if (reset_sdram) { |
| 55 | ast_scu_unlock(priv->scu); |
| 56 | setbits_le32(&priv->scu->sysreset_ctrl1, |
| 57 | SCU_SYSRESET_SDRAM_WDT); |
| 58 | ret = wdt_expire_now(priv->wdt, reset_ctl->id); |
| 59 | clrbits_le32(&priv->scu->sysreset_ctrl1, |
| 60 | SCU_SYSRESET_SDRAM_WDT); |
| 61 | ast_scu_lock(priv->scu); |
| 62 | } else { |
| 63 | ret = wdt_expire_now(priv->wdt, reset_ctl->id); |
| 64 | } |
| 65 | |
| 66 | return ret; |
| 67 | } |
| 68 | |
| 69 | static int ast2500_reset_request(struct reset_ctl *reset_ctl) |
| 70 | { |
| 71 | debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, |
| 72 | reset_ctl->dev, reset_ctl->id); |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | static int ast2500_reset_probe(struct udevice *dev) |
| 78 | { |
| 79 | struct ast2500_reset_priv *priv = dev_get_priv(dev); |
| 80 | |
| 81 | priv->scu = ast_get_scu(); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static const struct udevice_id ast2500_reset_ids[] = { |
| 87 | { .compatible = "aspeed,ast2500-reset" }, |
| 88 | { } |
| 89 | }; |
| 90 | |
| 91 | struct reset_ops ast2500_reset_ops = { |
| 92 | .rst_assert = ast2500_reset_assert, |
| 93 | .request = ast2500_reset_request, |
| 94 | }; |
| 95 | |
| 96 | U_BOOT_DRIVER(ast2500_reset) = { |
| 97 | .name = "ast2500_reset", |
| 98 | .id = UCLASS_RESET, |
| 99 | .of_match = ast2500_reset_ids, |
| 100 | .probe = ast2500_reset_probe, |
| 101 | .ops = &ast2500_reset_ops, |
| 102 | .ofdata_to_platdata = ast2500_ofdata_to_platdata, |
| 103 | .priv_auto_alloc_size = sizeof(struct ast2500_reset_priv), |
| 104 | }; |