blob: 90f37a123cd82beb429142370adff16c2eee21f0 [file] [log] [blame]
Bharat Kumar Reddy Gooty436efc02019-12-16 09:09:43 -08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Broadcom.
4 */
5#include <common.h>
6#include <asm/gic.h>
7#include <asm/gic-v3.h>
8#include <asm/io.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -06009#include <linux/bitops.h>
Wasim Khan1fc54802020-02-14 11:00:52 +053010#include <linux/sizes.h>
Bharat Kumar Reddy Gooty436efc02019-12-16 09:09:43 -080011
12static u32 lpi_id_bits;
13
14#define LPI_NRBITS lpi_id_bits
15#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
16#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
17
18/*
19 * Program the GIC LPI configuration tables for all
20 * the re-distributors and enable the LPI table
21 * base: Configuration table address
22 * num_redist: number of redistributors
23 */
24int gic_lpi_tables_init(u64 base, u32 num_redist)
25{
26 u32 gicd_typer;
27 u64 val;
28 u64 tmp;
29 int i;
30 u64 redist_lpi_base;
31 u64 pend_base = GICR_BASE + GICR_PENDBASER;
32
33 gicd_typer = readl(GICD_BASE + GICD_TYPER);
34
35 /* GIC support for Locality specific peripheral interrupts (LPI's) */
36 if (!(gicd_typer & GICD_TYPER_LPIS)) {
37 pr_err("GIC implementation does not support LPI's\n");
38 return -EINVAL;
39 }
40
41 /*
42 * Check for LPI is disabled for all the redistributors.
43 * Once the LPI table is enabled, can not program the
44 * LPI configuration tables again, unless the GIC is reset.
45 */
46 for (i = 0; i < num_redist; i++) {
47 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
48
49 if ((readl((uintptr_t)(GICR_BASE + offset))) &
50 GICR_CTLR_ENABLE_LPIS) {
51 pr_err("Re-Distributor %d LPI is already enabled\n",
52 i);
53 return -EINVAL;
54 }
55 }
56
57 /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */
58 lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer),
59 ITS_MAX_LPI_NRBITS);
60
61 /* Set PropBase */
62 val = (base |
63 GICR_PROPBASER_INNERSHAREABLE |
64 GICR_PROPBASER_RAWAWB |
65 ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK));
66
67 writeq(val, (GICR_BASE + GICR_PROPBASER));
68 tmp = readl(GICR_BASE + GICR_PROPBASER);
69 if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
70 if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) {
71 val &= ~(GICR_PROPBASER_SHAREABILITY_MASK |
72 GICR_PROPBASER_CACHEABILITY_MASK);
73 val |= GICR_PROPBASER_NC;
74 writeq(val, (GICR_BASE + GICR_PROPBASER));
75 }
76 }
77
78 redist_lpi_base = base + LPI_PROPBASE_SZ;
79
80 for (i = 0; i < num_redist; i++) {
81 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
82
83 val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) |
84 GICR_PENDBASER_INNERSHAREABLE |
85 GICR_PENDBASER_RAWAWB);
86
87 writeq(val, (uintptr_t)(pend_base + offset));
88 tmp = readq((uintptr_t)(pend_base + offset));
89 if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
90 val &= ~(GICR_PENDBASER_SHAREABILITY_MASK |
91 GICR_PENDBASER_CACHEABILITY_MASK);
92 val |= GICR_PENDBASER_NC;
93 writeq(val, (uintptr_t)(pend_base + offset));
94 }
95
96 /* Enable LPI for the redistributor */
97 writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset));
98 }
99
100 return 0;
101}
102