| Simon Glass | 5f8865f | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 1 | CONFIG_X86=y |
| Bin Meng | 03b341b | 2015-04-27 23:22:24 +0800 | [diff] [blame] | 2 | CONFIG_VENDOR_GOOGLE=y |
| Simon Glass | 5f8865f | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther" |
| Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 4 | CONFIG_TARGET_CHROMEBOX_PANTHER=y |
| Bin Meng | 21666cf | 2015-10-11 21:37:36 -0700 | [diff] [blame] | 5 | CONFIG_ENABLE_MRC_CACHE=y |
| Bin Meng | 6dd8ddc | 2016-03-21 06:47:40 -0700 | [diff] [blame] | 6 | CONFIG_HAVE_MRC=y |
| Bin Meng | 4de3886 | 2015-07-06 16:31:33 +0800 | [diff] [blame] | 7 | CONFIG_HAVE_VGA_BIOS=y |
| Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 8 | CONFIG_FIT=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 9 | CONFIG_BOOTSTAGE=y |
| 10 | CONFIG_BOOTSTAGE_REPORT=y | ||||
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 11 | # CONFIG_CMD_IMLS is not set |
| 12 | # CONFIG_CMD_FLASH is not set | ||||
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 13 | CONFIG_CMD_GPIO=y |
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 14 | # CONFIG_CMD_SETEXPR is not set |
| 15 | # CONFIG_CMD_NFS is not set | ||||
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 16 | CONFIG_CMD_BOOTSTAGE=y |
| Simon Glass | 347a622 | 2015-08-22 18:31:39 -0600 | [diff] [blame] | 17 | CONFIG_CMD_TPM=y |
| Simon Glass | 81ab547 | 2015-08-22 18:31:43 -0600 | [diff] [blame] | 18 | CONFIG_CMD_TPM_TEST=y |
| Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 19 | CONFIG_OF_CONTROL=y |
| Simon Glass | 43a5034 | 2016-01-17 16:11:58 -0700 | [diff] [blame] | 20 | CONFIG_REGMAP=y |
| 21 | CONFIG_SYSCON=y | ||||
| Simon Glass | dfb7c6c | 2015-07-27 15:47:22 -0600 | [diff] [blame] | 22 | CONFIG_CMD_CROS_EC=y |
| 23 | CONFIG_CROS_EC=y | ||||
| 24 | CONFIG_CROS_EC_LPC=y | ||||
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 25 | CONFIG_SPI_FLASH=y |
| Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 26 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 27 | CONFIG_SPI_FLASH_MACRONIX=y | ||||
| 28 | CONFIG_SPI_FLASH_WINBOND=y | ||||
| Bin Meng | 12b73d7 | 2016-02-02 05:58:06 -0800 | [diff] [blame] | 29 | CONFIG_DM_ETH=y |
| Bin Meng | 2997122 | 2016-03-21 06:47:42 -0700 | [diff] [blame] | 30 | CONFIG_RTL8169=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 31 | CONFIG_DM_PCI=y |
| 32 | CONFIG_DM_RTC=y | ||||
| Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 33 | CONFIG_SYS_NS16550=y |
| Bin Meng | 72a049d | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 34 | CONFIG_ICH_SPI=y |
| Bin Meng | 38de020 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 35 | CONFIG_TIMER=y |
| Simon Glass | 8b6216a | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 36 | CONFIG_TPM_TIS_LPC=y |
| Simon Glass | 28debcd | 2016-01-17 16:11:43 -0700 | [diff] [blame] | 37 | CONFIG_USB=y |
| 38 | CONFIG_DM_USB=y | ||||
| Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 39 | CONFIG_VIDEO_VESA=y |
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 40 | CONFIG_FRAMEBUFFER_SET_VESA_MODE=y |
| 41 | CONFIG_FRAMEBUFFER_VESA_MODE_11A=y | ||||
| 42 | CONFIG_USE_PRIVATE_LIBGCC=y | ||||
| Simon Glass | 8b6216a | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 43 | CONFIG_TPM=y |