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Daniel Hellstromce43fed2008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H__
30#define __CONFIG_H__
31
32/*
33 * High Level Configuration Options
34 * (easy to change)
35 *
36 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
37 *
38 * TSIM command
39 * tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
40 *
41 */
42
43#define CONFIG_LEON3 /* This is an LEON3 CPU */
44#define CONFIG_LEON 1 /* This is an LEON CPU */
45#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
46#define CONFIG_TSIM 1 /* ... running on TSIM */
47
48/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020049#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010050
51/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstromce43fed2008-03-28 10:06:52 +010053
54/*
55 * Serial console configuration
56 */
57#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020058#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromce43fed2008-03-28 10:06:52 +010059
60/* Partitions */
61#define CONFIG_DOS_PARTITION
62#define CONFIG_MAC_PARTITION
63#define CONFIG_ISO_PARTITION
64
65/*
66 * Supported commands
67 */
68#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
69#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */
70#define CONFIG_CMD_BDI /* bdinfo */
71#define CONFIG_CMD_CONSOLE /* coninfo */
72#define CONFIG_CMD_DIAG
73#define CONFIG_CMD_ECHO /* echo arguments */
74#define CONFIG_CMD_FPGA /* FPGA configuration Support */
75#define CONFIG_CMD_IRQ
76#define CONFIG_CMD_ITEST /* Integer (and string) test */
77#define CONFIG_CMD_LOADB /* loadb */
78#define CONFIG_CMD_LOADS /* loads */
79#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
80#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
81#define CONFIG_CMD_REGINFO
82#define CONFIG_CMD_RUN /* run command in env variable */
83#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
84#define CONFIG_CMD_XIMG /* Load part of Multi Image */
85
86/*
87 * Autobooting
88 */
89#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
90
91#define CONFIG_PREBOOT "echo;" \
92 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
93 "echo"
94
95#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096/*#define CONFIG_SYS_HUSH_PARSER 0*/
97#ifdef CONFIG_SYS_HUSH_PARSER
98#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Daniel Hellstromce43fed2008-03-28 10:06:52 +010099#endif
100
101#define CONFIG_EXTRA_ENV_SETTINGS \
102 "netdev=eth0\0" \
103 "nfsargs=setenv bootargs root=/dev/nfs rw " \
104 "nfsroot=${serverip}:${rootpath}\0" \
105 "ramargs=setenv bootargs root=/dev/ram rw\0" \
106 "addip=setenv bootargs ${bootargs} " \
107 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
108 ":${hostname}:${netdev}:off panic=1\0" \
109 "flash_nfs=run nfsargs addip;" \
110 "bootm ${kernel_addr}\0" \
111 "flash_self=run ramargs addip;" \
112 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
113 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
114 "rootpath=/export/roofs\0" \
115 "scratch=40000000\0" \
116 "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
117 "ethaddr=00:00:7A:CC:00:12\0" \
118 "bootargs=console=ttyS0,38400" \
119 ""
120#define CONFIG_NETMASK 255.255.255.0
121#define CONFIG_GATEWAYIP 192.168.0.1
122#define CONFIG_SERVERIP 192.168.0.81
123#define CONFIG_IPADDR 192.168.0.80
124#define CONFIG_ROOTPATH /export/rootfs
125#define CONFIG_HOSTNAME grxc3s1500
126#define CONFIG_BOOTFILE /uImage
127
128#define CONFIG_BOOTCOMMAND "run flash_self"
129
130/* Memory MAP
131 *
132 * Flash:
133 * |--------------------------------|
134 * | 0x00000000 Text & Data & BSS | *
135 * | for Monitor | *
136 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
137 * | UNUSED / Growth | * 256kb
138 * |--------------------------------|
139 * | 0x00050000 Base custom area | *
140 * | kernel / FS | *
141 * | | * Rest of Flash
142 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
143 * | END-0x00008000 Environment | * 32kb
144 * |--------------------------------|
145 *
146 *
147 *
148 * Main Memory:
149 * |--------------------------------|
150 * | UNUSED / scratch area |
151 * | |
152 * | |
153 * | |
154 * | |
155 * |--------------------------------|
156 * | Monitor .Text / .DATA / .BSS | * 256kb
157 * | Relocated! | *
158 * |--------------------------------|
159 * | Monitor Malloc | * 128kb (contains relocated environment)
160 * |--------------------------------|
161 * | Monitor/kernel STACK | * 64kb
162 * |--------------------------------|
163 * | Page Table for MMU systems | * 2k
164 * |--------------------------------|
165 * | PROM Code accessed from Linux | * 6kb-128b
166 * |--------------------------------|
167 * | Global data (avail from kernel)| * 128b
168 * |--------------------------------|
169 *
170 */
171
172/*
173 * Flash configuration (8,16 or 32 MB)
174 * TEXT base always at 0xFFF00000
175 * ENV_ADDR always at 0xFFF40000
176 * FLASH_BASE at 0xFC000000 for 64 MB
177 * 0xFE000000 for 32 MB
178 * 0xFF000000 for 16 MB
179 * 0xFF800000 for 8 MB
180 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200181#define CONFIG_SYS_NO_FLASH 1
182#define CONFIG_SYS_FLASH_BASE 0x00000000
183#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200184#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100185
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100187
188#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200189#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
190#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100191
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
193#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
194#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
195#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100196
197#ifdef ENABLE_FLASH_SUPPORT
198/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200199#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100200
201#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
202
203/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200205#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100207#endif
208
209/*
210 * Environment settings
211 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200212#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200213/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200214/*#define CONFIG_ENV_SIZE 0x8000*/
215#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100216#define CONFIG_ENV_OVERWRITE 1
217
218/*
219 * Memory map
220 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_SDRAM_BASE 0x40000000
222#define CONFIG_SYS_SDRAM_SIZE 0x02000000
223#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100224
225/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200226#undef CONFIG_SYS_SRAM_BASE
227#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100228
229/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
231#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
232#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100233
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
235#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100236
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_PROM_SIZE (8192-CONFIG_SYS_GBL_DATA_SIZE)
238#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100239
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
241#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100242
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
244#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
245# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100246#endif
247
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
249#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
250#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100251
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200252#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
253#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100254
255/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200256#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
257#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100258
259/* make un relocated address from relocated address */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200260#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100261
262/*
263 * Ethernet configuration
264 */
265#define CONFIG_GRETH 1
266#define CONFIG_NET_MULTI 1
267
268/* Default HARDWARE address */
269#define GRETH_HWADDR_0 0x00
270#define GRETH_HWADDR_1 0x00
271#define GRETH_HWADDR_2 0x7A
272#define GRETH_HWADDR_3 0xcc
273#define GRETH_HWADDR_4 0x00
274#define GRETH_HWADDR_5 0x12
275
276#define CONFIG_ETHADDR 00:00:7a:cc:00:12
277
278/*
279 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
280 */
281/* #define CONFIG_GRETH_10MBIT 1 */
282#define CONFIG_PHY_ADDR 0x00
283
284/*
285 * Miscellaneous configurable options
286 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200287#define CONFIG_SYS_LONGHELP /* undef to save memory */
288#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100289#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200290#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100291#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200292#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100293#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200294#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
295#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
296#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100297
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200298#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
299#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100300
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200301#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100302
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200303#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100304
305/***** Gaisler GRLIB IP-Cores Config ********/
306
307/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200308/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100309
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200310#define CONFIG_SYS_GRLIB_SDRAM 0
311#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100312#if CONFIG_GRSIM
313/* GRSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200314#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100315#else
316/* TSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200317#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100318#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200319#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100320
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200321#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
322#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
323#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100324
325/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200326#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100327
328/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200329#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
330#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100331
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200332#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100333 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
334
335/* default kernel command line */
336#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
337
338#define CONFIG_IDENT_STRING "Gaisler GRSIM"
339
340#endif /* __CONFIG_H */