blob: 06010d6b149605829abbf5a7f361cfcbc58da99e [file] [log] [blame]
Stefan Roese90c932b2009-10-27 16:11:26 +01001/*
2 * Copyright 2007-2009 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include "config.h" /* CONFIG_BOARDDIR */
24
25#ifndef RESET_VECTOR_ADDRESS
Ricardo Ribalda Delgadob3843812010-12-07 14:27:56 +010026#ifdef CONFIG_RESET_VECTOR_ADDRESS
27#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
28#else
Stefan Roese90c932b2009-10-27 16:11:26 +010029#define RESET_VECTOR_ADDRESS 0xfffffffc
30#endif
Ricardo Ribalda Delgadob3843812010-12-07 14:27:56 +010031#endif
Stefan Roese90c932b2009-10-27 16:11:26 +010032
33OUTPUT_ARCH(powerpc)
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +010034
Stefan Roese90c932b2009-10-27 16:11:26 +010035PHDRS
36{
37 text PT_LOAD;
38 bss PT_LOAD;
39}
40
41SECTIONS
42{
43 /* Read-only sections, merged into text segment: */
44 . = + SIZEOF_HEADERS;
Stefan Roese90c932b2009-10-27 16:11:26 +010045 .text :
46 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +010047 *(.text*)
Stefan Roese90c932b2009-10-27 16:11:26 +010048 } :text
49 _etext = .;
50 PROVIDE (etext = .);
51 .rodata :
52 {
Stefan Roese90c932b2009-10-27 16:11:26 +010053 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
54 } :text
Stefan Roese90c932b2009-10-27 16:11:26 +010055
56 /* Read-write section, merged into data segment: */
57 . = (. + 0x00FF) & 0xFFFFFF00;
58 _erotext = .;
59 PROVIDE (erotext = .);
60 .reloc :
61 {
Stefan Roese90c932b2009-10-27 16:11:26 +010062 _GOT2_TABLE_ = .;
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +010063 KEEP(*(.got2))
Joakim Tjernlund42126a62010-12-03 17:30:37 +010064 KEEP(*(.got))
65 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
Stefan Roese90c932b2009-10-27 16:11:26 +010066 _FIXUP_TABLE_ = .;
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +010067 KEEP(*(.fixup))
Stefan Roese90c932b2009-10-27 16:11:26 +010068 }
Joakim Tjernlund42126a62010-12-03 17:30:37 +010069 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
Stefan Roese90c932b2009-10-27 16:11:26 +010070 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
71
72 .data :
73 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +010074 *(.data*)
75 *(.sdata*)
Stefan Roese90c932b2009-10-27 16:11:26 +010076 }
77 _edata = .;
78 PROVIDE (edata = .);
79
80 . = .;
Stefan Roese90c932b2009-10-27 16:11:26 +010081
Marek Vasut607092a2012-10-12 10:27:03 +000082 . = ALIGN(4);
83 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +000084 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +000085 }
86
Stefan Roese90c932b2009-10-27 16:11:26 +010087 . = .;
88 __start___ex_table = .;
89 __ex_table : { *(__ex_table) }
90 __stop___ex_table = .;
91
92 . = ALIGN(256);
93 __init_begin = .;
94 .text.init : { *(.text.init) }
95 .data.init : { *(.data.init) }
96 . = ALIGN(256);
97 __init_end = .;
98
99#ifdef CONFIG_440
100 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
101 {
Stefan Roese88fbf932010-04-15 16:07:28 +0200102 arch/powerpc/cpu/ppc4xx/start.o (.bootpg)
Stefan Roese90c932b2009-10-27 16:11:26 +0100103
104 /*
105 * PPC440 board need a board specific object with the
106 * TLB definitions. This needs to get included right after
107 * start.o, since the first shadow TLB only covers 4k
108 * of address space.
109 */
Ricardo Ribalda Delgadob3843812010-12-07 14:27:56 +0100110#ifdef CONFIG_INIT_TLB
111 CONFIG_INIT_TLB (.bootpg)
112#else
Stefan Roese90c932b2009-10-27 16:11:26 +0100113 CONFIG_BOARDDIR/init.o (.bootpg)
Ricardo Ribalda Delgadob3843812010-12-07 14:27:56 +0100114#endif
Stefan Roese90c932b2009-10-27 16:11:26 +0100115 } :text = 0xffff
116#endif
117
118 .resetvec RESET_VECTOR_ADDRESS :
119 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100120 KEEP(*(.resetvec))
Stefan Roese90c932b2009-10-27 16:11:26 +0100121 } :text = 0xffff
122
123 . = RESET_VECTOR_ADDRESS + 0x4;
124
125 /*
126 * Make sure that the bss segment isn't linked at 0x0, otherwise its
127 * address won't be updated during relocation fixups. Note that
128 * this is a temporary fix. Code to dynamically the fixup the bss
129 * location will be added in the future. When the bss relocation
130 * fixup code is present this workaround should be removed.
131 */
132#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
133 . |= 0x10;
134#endif
135
136 __bss_start = .;
137 .bss (NOLOAD) :
138 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100139 *(.bss*)
140 *(.sbss*)
Stefan Roese90c932b2009-10-27 16:11:26 +0100141 *(COMMON)
142 } :bss
143
144 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000145 __bss_end = . ;
Stefan Roese90c932b2009-10-27 16:11:26 +0100146 PROVIDE (end = .);
147}