Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 2 | /* |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 3 | * Copyright 2010-2012 Freescale Semiconductor, Inc. |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 4 | * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> |
| 5 | * Timur Tabi <timur@freescale.com> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <command.h> |
Simon Glass | 0af6e2d | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 10 | #include <env.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 11 | #include <pci.h> |
| 12 | #include <asm/processor.h> |
| 13 | #include <asm/mmu.h> |
| 14 | #include <asm/cache.h> |
| 15 | #include <asm/immap_85xx.h> |
| 16 | #include <asm/fsl_pci.h> |
York Sun | f062659 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 17 | #include <fsl_ddr_sdram.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 18 | #include <asm/fsl_serdes.h> |
| 19 | #include <asm/io.h> |
Masahiro Yamada | 75f82d0 | 2018-03-05 01:20:11 +0900 | [diff] [blame] | 20 | #include <linux/libfdt.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 21 | #include <fdt_support.h> |
Andy Fleming | 422effd | 2011-04-08 02:10:54 -0500 | [diff] [blame] | 22 | #include <fsl_mdio.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 23 | #include <tsec.h> |
| 24 | #include <asm/fsl_law.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 25 | #include <netdev.h> |
| 26 | #include <i2c.h> |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 27 | #include <hwconfig.h> |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 28 | |
| 29 | #include "../common/ngpixis.h" |
| 30 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 31 | int board_early_init_f(void) |
| 32 | { |
| 33 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 34 | |
| 35 | /* Set pmuxcr to allow both i2c1 and i2c2 */ |
| 36 | setbits_be32(&gur->pmuxcr, 0x1000); |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 37 | #ifdef CONFIG_SYS_RAMBOOT |
| 38 | setbits_be32(&gur->pmuxcr, |
| 39 | in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); |
| 40 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 41 | |
| 42 | /* Read back the register to synchronize the write. */ |
| 43 | in_be32(&gur->pmuxcr); |
| 44 | |
| 45 | /* Set the pin muxing to enable ETSEC2. */ |
| 46 | clrbits_be32(&gur->pmuxcr2, 0x001F8000); |
| 47 | |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 48 | /* Enable the SPI */ |
| 49 | clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); |
| 50 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | int checkboard(void) |
| 55 | { |
| 56 | u8 sw; |
| 57 | |
Timur Tabi | 56953ee | 2012-03-15 11:42:27 +0000 | [diff] [blame] | 58 | printf("Board: P1022DS Sys ID: 0x%02x, " |
| 59 | "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 60 | in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); |
| 61 | |
| 62 | sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); |
| 63 | |
| 64 | switch ((sw & PIXIS_LBMAP_MASK) >> 6) { |
| 65 | case 0: |
| 66 | printf ("vBank: %u\n", ((sw & 0x30) >> 4)); |
| 67 | break; |
| 68 | case 1: |
| 69 | printf ("NAND\n"); |
| 70 | break; |
| 71 | case 2: |
| 72 | case 3: |
| 73 | puts ("Promjet\n"); |
| 74 | break; |
| 75 | } |
| 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 80 | #define CONFIG_TFP410_I2C_ADDR 0x38 |
| 81 | |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 82 | /* Masks for the SSI_TDM and AUDCLK bits of the ngPIXIS BRDCFG1 register. */ |
| 83 | #define CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK 0x0c |
| 84 | #define CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK 0x03 |
| 85 | |
| 86 | /* Route the I2C1 pins to the SSI port instead. */ |
| 87 | #define CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI 0x08 |
| 88 | |
| 89 | /* Choose the 12.288Mhz codec reference clock */ |
| 90 | #define CONFIG_PIXIS_BRDCFG1_AUDCLK_12 0x02 |
| 91 | |
| 92 | /* Choose the 11.2896Mhz codec reference clock */ |
| 93 | #define CONFIG_PIXIS_BRDCFG1_AUDCLK_11 0x01 |
| 94 | |
Jiang Yutang | f71233d | 2011-03-04 10:25:54 +0800 | [diff] [blame] | 95 | /* Connect to USB2 */ |
| 96 | #define CONFIG_PIXIS_BRDCFG0_USB2 0x10 |
| 97 | /* Connect to TFM bus */ |
| 98 | #define CONFIG_PIXIS_BRDCFG1_TDM 0x0c |
| 99 | /* Connect to SPI */ |
| 100 | #define CONFIG_PIXIS_BRDCFG0_SPI 0x80 |
| 101 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 102 | int misc_init_r(void) |
| 103 | { |
| 104 | u8 temp; |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 105 | const char *audclk; |
| 106 | size_t arglen; |
Jiang Yutang | f71233d | 2011-03-04 10:25:54 +0800 | [diff] [blame] | 107 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 108 | |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 109 | /* For DVI, enable the TFP410 Encoder. */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 110 | |
| 111 | temp = 0xBF; |
| 112 | if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) |
| 113 | return -1; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 114 | if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) |
| 115 | return -1; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 116 | debug("DVI Encoder Read: 0x%02x\n", temp); |
| 117 | |
| 118 | temp = 0x10; |
| 119 | if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) |
| 120 | return -1; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 121 | if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) |
| 122 | return -1; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 123 | debug("DVI Encoder Read: 0x%02x\n",temp); |
| 124 | |
Jiang Yutang | f71233d | 2011-03-04 10:25:54 +0800 | [diff] [blame] | 125 | /* Enable the USB2 in PMUXCR2 and FGPA */ |
| 126 | if (hwconfig("usb2")) { |
| 127 | clrsetbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_ETSECUSB_MASK, |
| 128 | MPC85xx_PMUXCR2_USB); |
| 129 | setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_USB2); |
| 130 | } |
| 131 | |
| 132 | /* tdm and audio can not enable simultaneous*/ |
| 133 | if (hwconfig("tdm") && hwconfig("audclk")){ |
| 134 | printf("WARNING: TDM and AUDIO can not be enabled simultaneous !\n"); |
| 135 | return -1; |
| 136 | } |
| 137 | |
| 138 | /* Enable the TDM in PMUXCR and FGPA */ |
| 139 | if (hwconfig("tdm")) { |
| 140 | clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_MASK, |
| 141 | MPC85xx_PMUXCR_TDM); |
| 142 | setbits_8(&pixis->brdcfg1, CONFIG_PIXIS_BRDCFG1_TDM); |
| 143 | /* TDM need some configration option by SPI */ |
| 144 | clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SPI_MASK, |
| 145 | MPC85xx_PMUXCR_SPI); |
| 146 | setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_SPI); |
| 147 | } |
| 148 | |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 149 | /* |
| 150 | * Enable the reference clock for the WM8776 codec, and route the MUX |
| 151 | * pins for SSI. The default is the 12.288 MHz clock |
| 152 | */ |
| 153 | |
Jiang Yutang | f71233d | 2011-03-04 10:25:54 +0800 | [diff] [blame] | 154 | if (hwconfig("audclk")) { |
| 155 | temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK | |
| 156 | CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK); |
| 157 | temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI; |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 158 | |
Jiang Yutang | f71233d | 2011-03-04 10:25:54 +0800 | [diff] [blame] | 159 | audclk = hwconfig_arg("audclk", &arglen); |
| 160 | /* Check the first two chars only */ |
| 161 | if (audclk && (strncmp(audclk, "11", 2) == 0)) |
| 162 | temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11; |
| 163 | else |
| 164 | temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12; |
| 165 | setbits_8(&pixis->brdcfg1, temp); |
| 166 | } |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 167 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 168 | return 0; |
| 169 | } |
| 170 | |
Kumar Gala | b07fbe6 | 2010-07-08 22:27:30 -0500 | [diff] [blame] | 171 | /* |
| 172 | * A list of PCI and SATA slots |
| 173 | */ |
| 174 | enum slot_id { |
| 175 | SLOT_PCIE1 = 1, |
| 176 | SLOT_PCIE2, |
| 177 | SLOT_PCIE3, |
| 178 | SLOT_PCIE4, |
| 179 | SLOT_PCIE5, |
| 180 | SLOT_SATA1, |
| 181 | SLOT_SATA2 |
| 182 | }; |
| 183 | |
| 184 | /* |
| 185 | * This array maps the slot identifiers to their names on the P1022DS board. |
| 186 | */ |
| 187 | static const char *slot_names[] = { |
| 188 | [SLOT_PCIE1] = "Slot 1", |
| 189 | [SLOT_PCIE2] = "Slot 2", |
| 190 | [SLOT_PCIE3] = "Slot 3", |
| 191 | [SLOT_PCIE4] = "Slot 4", |
| 192 | [SLOT_PCIE5] = "Mini-PCIe", |
| 193 | [SLOT_SATA1] = "SATA 1", |
| 194 | [SLOT_SATA2] = "SATA 2", |
| 195 | }; |
| 196 | |
| 197 | /* |
| 198 | * This array maps a given SERDES configuration and SERDES device to the PCI or |
| 199 | * SATA slot that it connects to. This mapping is hard-coded in the FPGA. |
| 200 | */ |
| 201 | static u8 serdes_dev_slot[][SATA2 + 1] = { |
| 202 | [0x01] = { [PCIE3] = SLOT_PCIE4, [PCIE2] = SLOT_PCIE5 }, |
| 203 | [0x02] = { [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 }, |
| 204 | [0x09] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE4, |
| 205 | [PCIE2] = SLOT_PCIE5 }, |
| 206 | [0x16] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE2, |
| 207 | [PCIE2] = SLOT_PCIE3, |
| 208 | [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 }, |
| 209 | [0x17] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE2, |
| 210 | [PCIE2] = SLOT_PCIE3 }, |
| 211 | [0x1a] = { [PCIE1] = SLOT_PCIE1, [PCIE2] = SLOT_PCIE3, |
| 212 | [PCIE2] = SLOT_PCIE3, |
| 213 | [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 }, |
| 214 | [0x1c] = { [PCIE1] = SLOT_PCIE1, |
| 215 | [SATA1] = SLOT_SATA1, [SATA2] = SLOT_SATA2 }, |
| 216 | [0x1e] = { [PCIE1] = SLOT_PCIE1, [PCIE3] = SLOT_PCIE3 }, |
| 217 | [0x1f] = { [PCIE1] = SLOT_PCIE1 }, |
| 218 | }; |
| 219 | |
| 220 | |
| 221 | /* |
| 222 | * Returns the name of the slot to which the PCIe or SATA controller is |
| 223 | * connected |
| 224 | */ |
Kumar Gala | 4d4384e | 2010-12-15 14:21:41 -0600 | [diff] [blame] | 225 | const char *board_serdes_name(enum srds_prtcl device) |
Kumar Gala | b07fbe6 | 2010-07-08 22:27:30 -0500 | [diff] [blame] | 226 | { |
| 227 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 228 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 229 | unsigned int srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> |
| 230 | MPC85xx_PORDEVSR_IO_SEL_SHIFT; |
| 231 | enum slot_id slot = serdes_dev_slot[srds_cfg][device]; |
| 232 | const char *name = slot_names[slot]; |
| 233 | |
| 234 | if (name) |
| 235 | return name; |
| 236 | else |
| 237 | return "Nothing"; |
| 238 | } |
| 239 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 240 | #ifdef CONFIG_PCI |
| 241 | void pci_init_board(void) |
| 242 | { |
Kumar Gala | 4d4384e | 2010-12-15 14:21:41 -0600 | [diff] [blame] | 243 | fsl_pcie_init_board(0); |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 244 | } |
| 245 | #endif |
| 246 | |
| 247 | int board_early_init_r(void) |
| 248 | { |
| 249 | const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; |
York Sun | 220c346 | 2014-06-24 21:16:20 -0700 | [diff] [blame] | 250 | int flash_esel = find_tlb_idx((void *)flashbase, 1); |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 251 | |
| 252 | /* |
| 253 | * Remap Boot flash + PROMJET region to caching-inhibited |
| 254 | * so that flash can be erased properly. |
| 255 | */ |
| 256 | |
| 257 | /* Flush d-cache and invalidate i-cache of any FLASH data */ |
| 258 | flush_dcache(); |
| 259 | invalidate_icache(); |
| 260 | |
York Sun | 220c346 | 2014-06-24 21:16:20 -0700 | [diff] [blame] | 261 | if (flash_esel == -1) { |
| 262 | /* very unlikely unless something is messed up */ |
| 263 | puts("Error: Could not find TLB for FLASH BASE\n"); |
| 264 | flash_esel = 2; /* give our best effort to continue */ |
| 265 | } else { |
| 266 | /* invalidate existing TLB entry for flash + promjet */ |
| 267 | disable_tlb(flash_esel); |
| 268 | } |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 269 | |
| 270 | set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, |
| 271 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
| 272 | 0, flash_esel, BOOKE_PAGESZ_256M, 1); |
| 273 | |
| 274 | return 0; |
| 275 | } |
| 276 | |
| 277 | /* |
| 278 | * Initialize on-board and/or PCI Ethernet devices |
| 279 | * |
| 280 | * Returns: |
| 281 | * <0, error |
| 282 | * 0, no ethernet devices found |
| 283 | * >0, number of ethernet devices initialized |
| 284 | */ |
| 285 | int board_eth_init(bd_t *bis) |
| 286 | { |
Andy Fleming | 422effd | 2011-04-08 02:10:54 -0500 | [diff] [blame] | 287 | struct fsl_pq_mdio_info mdio_info; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 288 | struct tsec_info_struct tsec_info[2]; |
| 289 | unsigned int num = 0; |
| 290 | |
| 291 | #ifdef CONFIG_TSEC1 |
| 292 | SET_STD_TSEC_INFO(tsec_info[num], 1); |
| 293 | num++; |
| 294 | #endif |
| 295 | #ifdef CONFIG_TSEC2 |
| 296 | SET_STD_TSEC_INFO(tsec_info[num], 2); |
| 297 | num++; |
| 298 | #endif |
| 299 | |
Andy Fleming | 422effd | 2011-04-08 02:10:54 -0500 | [diff] [blame] | 300 | mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; |
| 301 | mdio_info.name = DEFAULT_MII_NAME; |
| 302 | fsl_pq_mdio_init(bis, &mdio_info); |
| 303 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 304 | return tsec_eth_init(bis, tsec_info, num) + pci_eth_init(bis); |
| 305 | } |
| 306 | |
| 307 | #ifdef CONFIG_OF_BOARD_SETUP |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 308 | /** |
| 309 | * ft_codec_setup - fix up the clock-frequency property of the codec node |
| 310 | * |
| 311 | * Update the clock-frequency property based on the value of the 'audclk' |
Timur Tabi | a6bfef7 | 2011-06-08 12:10:49 -0500 | [diff] [blame] | 312 | * hwconfig option. If audclk is not specified, then don't write anything |
| 313 | * to the device tree, because it means that the codec clock is disabled. |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 314 | */ |
| 315 | static void ft_codec_setup(void *blob, const char *compatible) |
| 316 | { |
| 317 | const char *audclk; |
| 318 | size_t arglen; |
| 319 | u32 freq; |
| 320 | |
| 321 | audclk = hwconfig_arg("audclk", &arglen); |
Timur Tabi | a6bfef7 | 2011-06-08 12:10:49 -0500 | [diff] [blame] | 322 | if (audclk) { |
| 323 | if (strncmp(audclk, "11", 2) == 0) |
| 324 | freq = 11289600; |
| 325 | else |
| 326 | freq = 12288000; |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 327 | |
Timur Tabi | a6bfef7 | 2011-06-08 12:10:49 -0500 | [diff] [blame] | 328 | do_fixup_by_compat_u32(blob, compatible, "clock-frequency", |
| 329 | freq, 1); |
| 330 | } |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 331 | } |
| 332 | |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 333 | int ft_board_setup(void *blob, bd_t *bd) |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 334 | { |
| 335 | phys_addr_t base; |
| 336 | phys_size_t size; |
| 337 | |
| 338 | ft_cpu_setup(blob, bd); |
| 339 | |
Simon Glass | da1a134 | 2017-08-03 12:22:15 -0600 | [diff] [blame] | 340 | base = env_get_bootm_low(); |
| 341 | size = env_get_bootm_size(); |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 342 | |
| 343 | fdt_fixup_memory(blob, (u64)base, (u64)size); |
| 344 | |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 345 | #ifdef CONFIG_HAS_FSL_DR_USB |
Sriram Dash | 9fd465c | 2016-09-16 17:12:15 +0530 | [diff] [blame] | 346 | fsl_fdt_fixup_dr_usb(blob, bd); |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 347 | #endif |
| 348 | |
Kumar Gala | d0f27d3 | 2010-07-08 22:37:44 -0500 | [diff] [blame] | 349 | FT_FSL_PCI_SETUP; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 350 | |
| 351 | #ifdef CONFIG_FSL_SGMII_RISER |
| 352 | fsl_sgmii_riser_fdt_fixup(blob); |
| 353 | #endif |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 354 | |
| 355 | /* Update the WM8776 node's clock frequency property */ |
| 356 | ft_codec_setup(blob, "wlf,wm8776"); |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 357 | |
| 358 | return 0; |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 359 | } |
| 360 | #endif |