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Chandan Nath98b036e2011-10-14 02:58:24 +00001/*
2 * sys_proto.h
3 *
4 * System information header
5 *
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Chandan Nath98b036e2011-10-14 02:58:24 +00009 */
10
11#ifndef _SYS_PROTO_H_
12#define _SYS_PROTO_H_
pekon gupta5bbb0992013-11-22 16:53:29 +053013#include <linux/mtd/omap_gpmc.h>
Tom Rini72f36002014-05-16 13:02:24 -040014#include <asm/ti-common/sys_proto.h>
Tom Rini52437072013-08-30 16:28:46 -040015#include <asm/arch/cpu.h>
Chandan Nath98b036e2011-10-14 02:58:24 +000016
17#define BOARD_REV_ID 0x0
Chandan Nath98b036e2011-10-14 02:58:24 +000018
19u32 get_cpu_rev(void);
20u32 get_sysboot_value(void);
21
Satyanarayana, Sandhya11784752012-08-09 18:29:57 +000022extern struct ctrl_stat *cstat;
Chandan Nath98b036e2011-10-14 02:58:24 +000023u32 get_device_type(void);
Tom Rini51df26c2013-05-31 12:31:59 -040024void save_omap_boot_params(void);
Chandan Nath77a73fe2012-01-09 20:38:59 +000025void setup_clocks_for_console(void);
Heiko Schocher0ef08172013-06-04 11:01:06 +020026void mpu_pll_config_val(int mpull_m);
Tom Rini034aba72012-07-03 09:20:06 -070027void ddr_pll_config(unsigned int ddrpll_M);
Tom Rini7a247722012-07-31 10:50:01 -070028
Ilya Yanok2ebbb862012-11-06 13:06:30 +000029void sdelay(unsigned long);
Tom Rini8eb48ff2013-03-14 11:15:25 +000030
31struct gpmc_cs;
Ilya Yanok2ebbb862012-11-06 13:06:30 +000032void gpmc_init(void);
Mark Jackson7808e1e2013-02-18 01:26:29 +000033void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
34 u32 size);
Andreas Bießmann1e4eccf2013-04-04 23:52:50 +000035void omap_nand_switch_ecc(uint32_t, uint32_t);
Heiko Schocher8aa1da92013-06-05 07:47:56 +020036
Heiko Schocherb21f2ac2013-07-30 10:48:54 +053037void set_uart_mux_conf(void);
38void set_mux_conf_regs(void);
39void sdram_init(void);
Lokesh Vutla89a83bf2013-07-30 10:48:52 +053040u32 wait_on_value(u32, u32, void *, u32);
Heiko Schocherb21f2ac2013-07-30 10:48:54 +053041#ifdef CONFIG_NOR_BOOT
42void enable_norboot_pin_mux(void);
43#endif
Tom Riniac8fdf92013-08-30 16:28:44 -040044void am33xx_spl_board_init(void);
Tom Rini52437072013-08-30 16:28:46 -040045int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev);
46int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency);
Chandan Nath98b036e2011-10-14 02:58:24 +000047#endif