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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wenyou Yangc64a75a2015-10-30 09:55:52 +08002/*
3 * Copyright (C) 2015 Atmel Corporation
4 * Wenyou Yang <wenyou.yang@atmel.com>
Wenyou Yangc64a75a2015-10-30 09:55:52 +08005 */
6
7#include <common.h>
8#include <asm/io.h>
Wenyou Yangc64a75a2015-10-30 09:55:52 +08009#include <asm/arch/clk.h>
10#include <asm/arch/sama5d2.h>
11
Alexander Dahl3f775062019-03-22 14:25:54 +010012int _cpu_is_sama5d2(void)
Wenyou Yangc64a75a2015-10-30 09:55:52 +080013{
Wenyou Yang9366fd02017-09-13 14:58:53 +080014 unsigned int chip_id = get_chip_id();
15
16 return ((chip_id == ARCH_ID_SAMA5D2) ||
17 (chip_id == ARCH_ID_SAMA5D2_SIP)) ? 1 : 0;
18}
19
20char *get_cpu_name(void)
21{
22 unsigned int chip_id = get_chip_id();
Wenyou Yangc64a75a2015-10-30 09:55:52 +080023 unsigned int extension_id = get_extension_chip_id();
24
Wenyou Yang9366fd02017-09-13 14:58:53 +080025 if (chip_id == ARCH_ID_SAMA5D2) {
Wenyou Yangc64a75a2015-10-30 09:55:52 +080026 switch (extension_id) {
27 case ARCH_EXID_SAMA5D21CU:
28 return "SAMA5D21";
29 case ARCH_EXID_SAMA5D22CU:
30 return "SAMA5D22-CU";
31 case ARCH_EXID_SAMA5D22CN:
32 return "SAMA5D22-CN";
33 case ARCH_EXID_SAMA5D23CU:
34 return "SAMA5D23-CU";
35 case ARCH_EXID_SAMA5D24CX:
36 return "SAMA5D24-CX";
37 case ARCH_EXID_SAMA5D24CU:
38 return "SAMA5D24-CU";
39 case ARCH_EXID_SAMA5D26CU:
40 return "SAMA5D26-CU";
41 case ARCH_EXID_SAMA5D27CU:
42 return "SAMA5D27-CU";
43 case ARCH_EXID_SAMA5D27CN:
44 return "SAMA5D27-CN";
45 case ARCH_EXID_SAMA5D28CU:
46 return "SAMA5D28-CU";
47 case ARCH_EXID_SAMA5D28CN:
48 return "SAMA5D28-CN";
Hari Prasath03ecb902021-07-14 19:13:41 +053049 case ARCH_EXID_SAMA5D29CN:
50 return "SAMA5D29-CN";
Wenyou Yangc64a75a2015-10-30 09:55:52 +080051 }
52 }
53
Wenyou Yang9366fd02017-09-13 14:58:53 +080054 if ((chip_id == ARCH_ID_SAMA5D2) || (chip_id == ARCH_ID_SAMA5D2_SIP)) {
55 switch (extension_id) {
56 case ARCH_EXID_SAMA5D225C_D1M:
57 return "SAMA5D225 128M bits DDR2 SDRAM";
58 case ARCH_EXID_SAMA5D27C_D5M:
59 return "SAMA5D27 512M bits DDR2 SDRAM";
60 case ARCH_EXID_SAMA5D27C_D1G:
61 return "SAMA5D27 1G bits DDR2 SDRAM";
Nicolas Ferre08eb7c62019-08-08 07:48:23 +000062 case ARCH_EXID_SAMA5D27C_LD1G:
63 return "SAMA5D27 1G bits LPDDR2 SDRAM";
64 case ARCH_EXID_SAMA5D27C_LD2G:
65 return "SAMA5D27 2G bits LPDDR2 SDRAM";
Wenyou Yang9366fd02017-09-13 14:58:53 +080066 case ARCH_EXID_SAMA5D28C_D1G:
67 return "SAMA5D28 1G bits DDR2 SDRAM";
Nicolas Ferre08eb7c62019-08-08 07:48:23 +000068 case ARCH_EXID_SAMA5D28C_LD1G:
69 return "SAMA5D28 1G bits LPDDR2 SDRAM";
70 case ARCH_EXID_SAMA5D28C_LD2G:
71 return "SAMA5D28 2G bits LPDDR2 SDRAM";
Wenyou Yang9366fd02017-09-13 14:58:53 +080072 }
73 }
74
Wenyou Yangc64a75a2015-10-30 09:55:52 +080075 return "Unknown CPU type";
76}
77
78#ifdef CONFIG_USB_GADGET_ATMEL_USBA
79void at91_udp_hw_init(void)
80{
Wenyou Yangb5d886a2016-02-02 11:11:52 +080081 at91_upll_clk_enable();
Wenyou Yangc64a75a2015-10-30 09:55:52 +080082
83 at91_periph_clk_enable(ATMEL_ID_UDPHS);
84}
85#endif