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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roesee373c5f2009-01-21 17:24:49 +01002/*
3 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
Stefan Roesee373c5f2009-01-21 17:24:49 +01004 */
5
6/*
7 * This file contains the configuration parameters for the VCT board
8 * family:
9 *
10 * vct_premium
11 * vct_premium_small
12 * vct_premium_onenand
13 * vct_premium_onenand_small
14 * vct_platinum
15 * vct_platinum_small
16 * vct_platinum_onenand
17 * vct_platinum_onenand_small
18 * vct_platinumavc
19 * vct_platinumavc_small
20 * vct_platinumavc_onenand
21 * vct_platinumavc_onenand_small
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
Stefan Roesee373c5f2009-01-21 17:24:49 +010027#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
28#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
Stefan Roesee373c5f2009-01-21 17:24:49 +010029
30#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
31
Wolfgang Denk0708bc62010-10-07 21:51:12 +020032#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Stefan Roesee373c5f2009-01-21 17:24:49 +010033#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Stefan Roesee373c5f2009-01-21 17:24:49 +010034#define CONFIG_SYS_MALLOC_LEN (1 << 20)
35#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
36#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
37
38#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
39#define CONFIG_VCT_NOR
Stefan Roesee373c5f2009-01-21 17:24:49 +010040#endif
41
42/*
43 * UART
44 */
Detlev Zundelf04e2582009-04-23 13:14:20 +020045#ifdef CONFIG_VCT_PLATINUMAVC
46#define UART_1_BASE 0xBDC30000
47#else
48#define UART_1_BASE 0xBF89C000
49#endif
50
51#define CONFIG_SYS_NS16550_SERIAL
Detlev Zundelf04e2582009-04-23 13:14:20 +020052#define CONFIG_SYS_NS16550_REG_SIZE -4
53#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
Detlev Zundelf04e2582009-04-23 13:14:20 +020054#define CONFIG_SYS_NS16550_CLK 921600
Stefan Roesee373c5f2009-01-21 17:24:49 +010055
56/*
57 * SDRAM
58 */
59#define CONFIG_SYS_SDRAM_BASE 0x80000000
60#define CONFIG_SYS_MBYTES_SDRAM 128
61#define CONFIG_SYS_MEMTEST_START 0x80200000
62#define CONFIG_SYS_MEMTEST_END 0x80400000
63#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
64
65#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
Stefan Roesee373c5f2009-01-21 17:24:49 +010066#define CONFIG_NET_RETRY_COUNT 20
67#endif
68
69/*
70 * Commands
71 */
Stefan Roesee373c5f2009-01-21 17:24:49 +010072#if defined(CONFIG_CMD_USB)
Stefan Roesee373c5f2009-01-21 17:24:49 +010073
74/*
75 * USB/EHCI
76 */
Stefan Roesee373c5f2009-01-21 17:24:49 +010077#define CONFIG_USB_EHCI_VCT /* on VCT platform */
Stefan Roesee373c5f2009-01-21 17:24:49 +010078#define CONFIG_EHCI_MMIO_BIG_ENDIAN
79#define CONFIG_EHCI_DESC_BIG_ENDIAN
80#define CONFIG_EHCI_IS_TDI
81#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
82#endif /* CONFIG_CMD_USB */
83
Stefan Roesee373c5f2009-01-21 17:24:49 +010084/*
85 * BOOTP options
86 */
87#define CONFIG_BOOTP_BOOTFILESIZE
Stefan Roesee373c5f2009-01-21 17:24:49 +010088
89/*
90 * Miscellaneous configurable options
91 */
Stefan Roesee373c5f2009-01-21 17:24:49 +010092#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Stefan Roesee373c5f2009-01-21 17:24:49 +010093#define CONFIG_TIMESTAMP /* Print image info with timestamp */
Stefan Roesee373c5f2009-01-21 17:24:49 +010094
95/*
96 * FLASH and environment organization
97 */
98#if defined(CONFIG_VCT_NOR)
Stefan Roesee373c5f2009-01-21 17:24:49 +010099#define CONFIG_FLASH_NOT_MEM_MAPPED
100
101/*
102 * We need special accessor functions for the CFI FLASH driver. This
103 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
104 */
105#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
106
107/*
108 * For the non-memory-mapped NOR FLASH, we need to define the
109 * NOR FLASH area. This can't be detected via the addr2info()
110 * function, since we check for flash access in the very early
111 * U-Boot code, before the NOR FLASH is detected.
112 */
113#define CONFIG_FLASH_BASE 0xb0000000
114#define CONFIG_FLASH_END 0xbfffffff
115
116/*
117 * CFI driver settings
118 */
119#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
120#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
121#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
122#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
123
124#define CONFIG_SYS_FLASH_BASE 0xb0000000
125#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
126#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
127#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
128
129#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
130#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
131
132#ifdef CONFIG_ENV_IS_IN_FLASH
133#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
134#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
135#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
136
137/* Address and size of Redundant Environment Sector */
138#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
139#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
140#endif /* CONFIG_ENV_IS_IN_FLASH */
141#endif /* CONFIG_VCT_NOR */
142
143#if defined(CONFIG_VCT_ONENAND)
144#define CONFIG_USE_ONENAND_BOARD_INIT
Stefan Roesee373c5f2009-01-21 17:24:49 +0100145#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
146#define CONFIG_SYS_FLASH_BASE 0x00000000
147#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
148#define CONFIG_ENV_SIZE (128 << 10) /* erase size */
149#endif /* CONFIG_VCT_ONENAND */
150
151/*
Stefan Roesee373c5f2009-01-21 17:24:49 +0100152 * I2C/EEPROM
153 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100154#define CONFIG_SYS_I2C
155#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
156#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
157#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
Stefan Roesee373c5f2009-01-21 17:24:49 +0100158
159/*
160 * Software (bit-bang) I2C driver configuration
161 */
162#define CONFIG_SYS_GPIO_I2C_SCL 11
163#define CONFIG_SYS_GPIO_I2C_SDA 10
164
165#ifndef __ASSEMBLY__
166int vct_gpio_dir(int pin, int dir);
167void vct_gpio_set(int pin, int val);
168int vct_gpio_get(int pin);
169#endif
170
171#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
172#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
173#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
174#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
175#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
176#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
177#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
178
179#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
180/* CAT24WC32 */
181#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
182#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
183 /* 32 byte page write mode using*/
184 /* last 5 bits of the address */
185#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
186
187#define CONFIG_BOOTCOMMAND "run test3"
Stefan Roesee373c5f2009-01-21 17:24:49 +0100188
189/*
Stefan Roesee373c5f2009-01-21 17:24:49 +0100190 * UBI configuration
191 */
192#if defined(CONFIG_VCT_ONENAND)
Stefan Roese5dc958f2009-05-12 14:32:58 +0200193#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100194#define CONFIG_MTD_PARTITIONS
Stefan Roesee373c5f2009-01-21 17:24:49 +0100195#endif
196
197/*
198 * We need a small, stripped down image to fit into the first 128k OneNAND
199 * erase block (gzipped). This image only needs basic commands for FLASH
200 * (NOR/OneNAND) usage and Linux kernel booting.
201 */
202#if defined(CONFIG_VCT_SMALL_IMAGE)
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100203#undef CONFIG_SYS_I2C_SOFT
Wolfgang Denk85c25df2009-04-01 23:34:12 +0200204#undef CONFIG_SOURCE
Stefan Roesee373c5f2009-01-21 17:24:49 +0100205#undef CONFIG_TIMESTAMP
206#endif /* CONFIG_VCT_SMALL_IMAGE */
207
208#endif /* __CONFIG_H */