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git01.mediatek.com / filogic / uboot / 561865edfeb763bfe4d6436859498fc5e23db3a2 / . / arch / mips / dts / pic32mzda_sk.dts
blob: b3c916a6dbf19cedf3e39051483a69b7a173878e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Purna Chandra Mandal745dd322016-01-28 15:30:17 +0530[diff] [blame]2/*
3 * Copyright (C) 2015 Purna Chandra Mandal, purna.mandal@microchip.com
Purna Chandra Mandal745dd322016-01-28 15:30:17 +0530[diff] [blame]4 */
5
6/dts-v1/;
7
8#include "pic32mzda.dtsi"
9
10/ {
11 model = "Microchip PIC32MZDASK";
12 compatible = "microchip,pic32mzdask", "microchip,pic32mzda";
13
14 aliases {
15 console = &uart2;
16 serial0 = &uart2;
17 };
18
19 chosen {
20 stdout-path = "serial0:115200n8";
21 };
22};
23
24&clock {
Purna Chandra Mandal85491f52016-01-28 15:30:19 +0530[diff] [blame]25 microchip,refo2-frequency = <50000000>;
26 microchip,refo4-frequency = <25000000>;
27 microchip,refo5-frequency = <40000000>;
Purna Chandra Mandal745dd322016-01-28 15:30:17 +0530[diff] [blame]28 status = "okay";
29 u-boot,dm-pre-reloc;
30};
31
32&pinctrl {
33 status = "okay";
34 u-boot,dm-pre-reloc;
35};
36
37&uart2 {
38 status = "okay";
39 u-boot,dm-pre-reloc;
40};
Purna Chandra Mandal85491f52016-01-28 15:30:19 +0530[diff] [blame]41
42&sdhci {
43 status = "okay";
Purna Chandra Mandald3191482016-01-28 15:30:22 +0530[diff] [blame]44};
45
46&ethernet {
47 reset-gpios = <&gpioJ 15 0>;
48 status = "okay";
49 phy-mode = "rmii";
50 phy-handle = <&ethernet_phy>;
51 ethernet_phy: lan8740_phy@0 {
52 reg = <0>;
53 };
Purna Chandra Mandala8b8f7b2016-03-21 13:05:43 +0530[diff] [blame]54};
55
56&usb {
57 status = "okay";
Purna Chandra Mandal85491f52016-01-28 15:30:19 +0530[diff] [blame]58};