blob: 64cc4ae7b61ead62855b7b5b9cdb48bb0ab90025 [file] [log] [blame]
Eugen Hristev3bd56102019-10-09 09:23:39 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019, Microchip Technology, Inc.
4 * Author: Eugen Hristev <eugen.hristev@microchip.com>
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Eugen Hristev3bd56102019-10-09 09:23:39 +000011#include <misc.h>
12#include <asm/io.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070013#include <linux/err.h>
Eugen Hristev3bd56102019-10-09 09:23:39 +000014
15struct microchip_flexcom_regs {
16 u32 cr;
17};
18
19struct microchip_flexcom_platdata {
20 struct microchip_flexcom_regs *regs;
21 u32 flexcom_mode;
22};
23
24static int microchip_flexcom_ofdata_to_platdata(struct udevice *dev)
25{
26 struct microchip_flexcom_platdata *plat = dev_get_platdata(dev);
27 int ret;
28
Masahiro Yamadaa89b4de2020-07-17 14:36:48 +090029 plat->regs = map_physmem(dev_read_addr(dev),
Eugen Hristev3bd56102019-10-09 09:23:39 +000030 sizeof(struct microchip_flexcom_regs),
31 MAP_NOCACHE);
32
33 ret = dev_read_u32(dev, "atmel,flexcom-mode", &plat->flexcom_mode);
34
35 if (IS_ERR_VALUE(ret)) {
36 debug("Missing atmel,flexcom-mode property\n");
37 return ret;
38 }
39
40 /*
41 * The mode must have only 2 bits. If any other bits are set,
42 * the value is not supported.
43 */
44 if (plat->flexcom_mode & 0xfffffffc) {
45 debug("Wrong atmel,flexcom-mode property\n");
46 return -EINVAL;
47 }
48
49 writel(plat->flexcom_mode, &plat->regs->cr);
50
51 return 0;
52}
53
54static const struct udevice_id microchip_flexcom_ids[] = {
55 { .compatible = "atmel,sama5d2-flexcom" },
56 { .compatible = "microchip,flexcom" },
57 {}
58};
59
60U_BOOT_DRIVER(microchip_flexcom) = {
61 .name = "microchip_flexcom",
62 .id = UCLASS_MISC,
63 .of_match = microchip_flexcom_ids,
64 .ofdata_to_platdata = microchip_flexcom_ofdata_to_platdata,
65 .platdata_auto_alloc_size = sizeof(struct microchip_flexcom_platdata),
66};