Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2017 Andes Technology Corporation |
| 4 | * Rick Chen, Andes Technology Corporation <rick@andestech.com> |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 7 | #include <common.h> |
| 8 | #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) |
| 9 | #include <netdev.h> |
| 10 | #endif |
| 11 | #include <linux/io.h> |
Rick Chen | cea16d0 | 2018-05-29 11:07:53 +0800 | [diff] [blame] | 12 | #include <faraday/ftsmc020.h> |
| 13 | #include <fdtdec.h> |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 14 | |
| 15 | DECLARE_GLOBAL_DATA_PTR; |
| 16 | |
Rick Chen | 2a21815 | 2018-12-03 17:48:20 +0800 | [diff] [blame] | 17 | extern phys_addr_t prior_stage_fdt_address; |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 18 | /* |
| 19 | * Miscellaneous platform dependent initializations |
| 20 | */ |
| 21 | |
| 22 | int board_init(void) |
| 23 | { |
Rick Chen | 36cb27c | 2017-12-26 13:55:53 +0800 | [diff] [blame] | 24 | gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; |
| 25 | |
| 26 | return 0; |
| 27 | } |
| 28 | |
| 29 | int dram_init(void) |
| 30 | { |
| 31 | unsigned long sdram_base = PHYS_SDRAM_0; |
| 32 | unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; |
| 33 | unsigned long actual_size; |
| 34 | |
| 35 | actual_size = get_ram_size((void *)sdram_base, expected_size); |
| 36 | gd->ram_size = actual_size; |
| 37 | |
| 38 | if (expected_size != actual_size) { |
| 39 | printf("Warning: Only %lu of %lu MiB SDRAM is working\n", |
| 40 | actual_size >> 20, expected_size >> 20); |
| 41 | } |
| 42 | |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | int dram_init_banksize(void) |
| 47 | { |
| 48 | gd->bd->bi_dram[0].start = PHYS_SDRAM_0; |
| 49 | gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; |
| 50 | gd->bd->bi_dram[1].start = PHYS_SDRAM_1; |
| 51 | gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; |
| 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) |
| 57 | int board_eth_init(bd_t *bd) |
| 58 | { |
| 59 | return ftmac100_initialize(bd); |
| 60 | } |
| 61 | #endif |
| 62 | |
| 63 | ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) |
| 64 | { |
| 65 | return 0; |
| 66 | } |
Rick Chen | 40a6fe7 | 2018-03-29 10:08:33 +0800 | [diff] [blame] | 67 | |
| 68 | void *board_fdt_blob_setup(void) |
| 69 | { |
Rick Chen | 40a6fe7 | 2018-03-29 10:08:33 +0800 | [diff] [blame] | 70 | return (void *)CONFIG_SYS_FDT_BASE; |
| 71 | } |
Rick Chen | cea16d0 | 2018-05-29 11:07:53 +0800 | [diff] [blame] | 72 | |
| 73 | int smc_init(void) |
| 74 | { |
| 75 | int node = -1; |
| 76 | const char *compat = "andestech,atfsmc020"; |
| 77 | void *blob = (void *)gd->fdt_blob; |
| 78 | fdt_addr_t addr; |
| 79 | struct ftsmc020_bank *regs; |
| 80 | |
| 81 | node = fdt_node_offset_by_compatible(blob, -1, compat); |
| 82 | if (node < 0) |
| 83 | return -FDT_ERR_NOTFOUND; |
| 84 | |
| 85 | addr = fdtdec_get_addr(blob, node, "reg"); |
| 86 | |
| 87 | if (addr == FDT_ADDR_T_NONE) |
| 88 | return -EINVAL; |
| 89 | |
| 90 | regs = (struct ftsmc020_bank *)addr; |
| 91 | regs->cr &= ~FTSMC020_BANK_WPROT; |
| 92 | |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 97 | int board_early_init_f(void) |
| 98 | { |
| 99 | smc_init(); |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | #endif |