Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
angelo@sysam.it | bb4ba2c | 2015-02-12 01:40:00 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2014 Angelo Dureghello <angelo@sysam.it> |
| 4 | * |
angelo@sysam.it | bb4ba2c | 2015-02-12 01:40:00 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __IMMAP_5307__ |
| 8 | #define __IMMAP_5307__ |
| 9 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 10 | #define MMAP_SIM (CFG_SYS_MBAR + 0x00000000) |
| 11 | #define MMAP_INTC (CFG_SYS_MBAR + 0x00000040) |
| 12 | #define MMAP_CSM (CFG_SYS_MBAR + 0x00000080) |
| 13 | #define MMAP_DRAMC (CFG_SYS_MBAR + 0x00000100) |
| 14 | #define MMAP_DTMR0 (CFG_SYS_MBAR + 0x00000140) |
| 15 | #define MMAP_DTMR1 (CFG_SYS_MBAR + 0x00000180) |
| 16 | #define MMAP_UART0 (CFG_SYS_MBAR + 0x000001C0) |
| 17 | #define MMAP_UART1 (CFG_SYS_MBAR + 0x00000200) |
| 18 | #define MMAP_GPIO (CFG_SYS_MBAR + 0x00000244) |
angelo@sysam.it | bb4ba2c | 2015-02-12 01:40:00 +0100 | [diff] [blame] | 19 | |
Tom Rini | 3cb9c37 | 2023-10-12 19:03:56 -0400 | [diff] [blame] | 20 | #include <linux/types.h> |
| 21 | |
angelo@sysam.it | bb4ba2c | 2015-02-12 01:40:00 +0100 | [diff] [blame] | 22 | typedef struct sim { |
| 23 | u8 rsr; |
| 24 | u8 sypcr; |
| 25 | u8 swivr; |
| 26 | u8 swsr; |
| 27 | u16 par; |
| 28 | u8 irqpar; |
| 29 | u8 res1; |
| 30 | u8 pllcr; |
| 31 | u8 res2; |
| 32 | u16 res3; |
| 33 | u8 mpark; |
| 34 | u8 res4; |
| 35 | u16 res5; |
| 36 | u32 res6; |
| 37 | } sim_t; |
| 38 | |
| 39 | typedef struct intctrl { |
| 40 | u32 ipr; |
| 41 | u32 imr; |
| 42 | u16 res7; |
| 43 | u8 res8; |
| 44 | u8 avr; |
| 45 | u8 icr0; |
| 46 | u8 icr1; |
| 47 | u8 icr2; |
| 48 | u8 icr3; |
| 49 | u8 icr4; |
| 50 | u8 icr5; |
| 51 | u8 icr6; |
| 52 | u8 icr7; |
| 53 | u8 icr8; |
| 54 | u8 icr9; |
| 55 | u16 res9; |
| 56 | } intctrl_t; |
| 57 | |
| 58 | typedef struct csm { |
| 59 | u16 csar0; /* Chip-select Address */ |
| 60 | u16 res1; |
| 61 | u32 csmr0; /* Chip-select Mask */ |
| 62 | u16 res2; |
| 63 | u16 cscr0; /* Chip-select Control */ |
| 64 | u16 csar1; |
| 65 | u16 res3; |
| 66 | u32 csmr1; |
| 67 | u16 res4; |
| 68 | u16 cscr1; |
| 69 | u16 csar2; |
| 70 | u16 res5; |
| 71 | u32 csmr2; |
| 72 | u16 res6; |
| 73 | u16 cscr2; |
| 74 | u16 csar3; |
| 75 | u16 res7; |
| 76 | u32 csmr3; |
| 77 | u16 res8; |
| 78 | u16 cscr3; |
| 79 | u16 csar4; |
| 80 | u16 res9; |
| 81 | u32 csmr4; |
| 82 | u16 res10; |
| 83 | u16 cscr4; |
| 84 | u16 csar5; |
| 85 | u16 res11; |
| 86 | u32 csmr5; |
| 87 | u16 res12; |
| 88 | u16 cscr5; |
| 89 | u16 csar6; |
| 90 | u16 res13; |
| 91 | u32 csmr6; |
| 92 | u16 res14; |
| 93 | u16 cscr6; |
| 94 | u16 csar7; |
| 95 | u16 res15; |
| 96 | u32 csmr7; |
| 97 | u16 res16; |
| 98 | u16 cscr7; |
| 99 | } csm_t; |
| 100 | |
| 101 | typedef struct sdramctrl { |
| 102 | u16 dcr; |
| 103 | u16 res1; |
| 104 | u32 res2; |
| 105 | u32 dacr0; |
| 106 | u32 dmr0; |
| 107 | u32 dacr1; |
| 108 | u32 dmr1; |
| 109 | } sdramctrl_t; |
| 110 | |
| 111 | typedef struct gpio { |
| 112 | u16 paddr; |
| 113 | u16 res1; |
| 114 | u16 padat; |
| 115 | u16 res2; |
| 116 | } gpio_t; |
| 117 | |
| 118 | #endif /* __IMMAP_5307__ */ |