Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 55c5d6f6f49d9a33a6c9491f1ec3bf156ae19ec4 / . / configs / ls1028aqds_tfa_lpuart_defconfig
blob: 2adb28c89d1398ef95ad12061ffeaeba6bea9cdc [file] [log] [blame]
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=25000000
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]4CONFIG_TARGET_LS1028AQDS=y
5CONFIG_TFABOOT=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x202000
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x6000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]9CONFIG_ENV_SIZE=0x2000
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]10CONFIG_ENV_OFFSET=0x500000
Kuldeep Singh2230d202021-03-03 17:04:23 +0530[diff] [blame]11CONFIG_ENV_SECT_SIZE=0x20000
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]12CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart"
Tom Rinie24547a2022-03-30 18:07:32 -0400[diff] [blame]14CONFIG_FSL_QIXIS=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]15CONFIG_FSPI_AHB_EN_4BYTE=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]16CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
17CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]18CONFIG_ENV_ADDR=0x20500000
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]19CONFIG_AHCI=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]20CONFIG_SYS_MEMTEST_START=0x80000000
21CONFIG_SYS_MEMTEST_END=0x9fffffff
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]22CONFIG_DISTRO_DEFAULTS=y
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]23CONFIG_REMAKE_ELF=y
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]24CONFIG_MP=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]25CONFIG_FIT_VERBOSE=y
26CONFIG_OF_BOARD_SETUP=y
27CONFIG_OF_STDOUT_VIA_ALIAS=y
28CONFIG_BOOTDELAY=10
29CONFIG_USE_BOOTARGS=y
30CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]31CONFIG_MISC_INIT_R=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]32CONFIG_ID_EEPROM=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]33CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]34CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Michal Simeka9565e92020-05-04 15:26:20 +0200[diff] [blame]35CONFIG_CMD_MEMTEST=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]36CONFIG_CMD_DM=y
Biwen Lic23b67e2021-02-05 19:02:08 +0800[diff] [blame]37CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]38CONFIG_CMD_GPT=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]39CONFIG_CMD_I2C=y
40CONFIG_CMD_MMC=y
41CONFIG_CMD_PCI=y
42CONFIG_CMD_USB=y
43CONFIG_CMD_WDT=y
44# CONFIG_CMD_SETEXPR is not set
45CONFIG_CMD_CACHE=y
46CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]47CONFIG_ENV_OVERWRITE=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]48CONFIG_ENV_IS_IN_MMC=y
49CONFIG_ENV_IS_IN_SPI_FLASH=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]50CONFIG_NET_RANDOM_ETHADDR=y
51CONFIG_NETCONSOLE=y
Tom Rinif9d5e832022-03-18 08:38:25 -0400[diff] [blame]52CONFIG_SYS_RX_ETH_BUFFER=8
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]53CONFIG_DM=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]54CONFIG_SATA=y
Tom Rinif4e64b92022-02-08 23:50:55 +0000[diff] [blame]55CONFIG_SCSI_AHCI=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]56CONFIG_SATA_CEVA=y
57CONFIG_FSL_CAAM=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]58# CONFIG_DDR_SPD is not set
Tom Rini3210bdc2022-03-30 18:07:31 -0400[diff] [blame]59CONFIG_DIMM_SLOTS_PER_CTLR=2
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]60CONFIG_MPC8XXX_GPIO=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]61CONFIG_DM_I2C=y
62CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]63CONFIG_I2C_MUX=y
64CONFIG_I2C_MUX_PCA954x=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]65CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]66CONFIG_FSL_ESDHC=y
67CONFIG_MTD=y
68CONFIG_DM_SPI_FLASH=y
Kuldeep Singhf2fd7aa2021-03-03 17:04:22 +0530[diff] [blame]69CONFIG_SPI_FLASH_EON=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]70CONFIG_SPI_FLASH_STMICRO=y
Kuldeep Singhf2fd7aa2021-03-03 17:04:22 +0530[diff] [blame]71CONFIG_SPI_FLASH_SST=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]72# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
73CONFIG_PHYLIB=y
74CONFIG_PHY_AQUANTIA=y
75CONFIG_PHY_ATHEROS=y
76CONFIG_PHY_VITESSE=y
Vladimir Olteanba212422021-11-09 17:02:31 +0530[diff] [blame]77CONFIG_PHY_FIXED=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]78CONFIG_DM_ETH=y
79CONFIG_DM_MDIO=y
80CONFIG_DM_MDIO_MUX=y
81CONFIG_E1000=y
82CONFIG_FSL_ENETC=y
83CONFIG_MDIO_MUX_I2CREG=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]84CONFIG_NVME_PCI=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]85CONFIG_PCI=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]86CONFIG_PCIE_ECAM_GENERIC=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]87CONFIG_PCIE_LAYERSCAPE_RC=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]88CONFIG_DM_RTC=y
89CONFIG_RTC_PCF2127=y
90CONFIG_SCSI=y
91CONFIG_DM_SCSI=y
Tom Rini37576b62020-06-16 19:06:21 -0400[diff] [blame]92CONFIG_SPECIFY_CONSOLE_INDEX=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]93CONFIG_DM_SERIAL=y
94CONFIG_FSL_LPUART=y
Tom Rini037415a2022-03-23 17:20:00 -0400[diff] [blame]95CONFIG_LPUART=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]96CONFIG_SPI=y
97CONFIG_DM_SPI=y
98CONFIG_FSL_DSPI=y
99CONFIG_NXP_FSPI=y
100CONFIG_USB=y
Yuantian Tanged9f4572020-04-22 11:34:39 +0800[diff] [blame]101CONFIG_USB_XHCI_HCD=y
102CONFIG_USB_XHCI_DWC3=y
103CONFIG_WDT=y
104CONFIG_WDT_SP805=y
105CONFIG_OF_LIBFDT_OVERLAY=y
106CONFIG_EFI_LOADER_BOUNCE_BUFFER=y