Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 Samsung Electronics |
| 3 | * |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 4 | * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 9 | #ifndef __CONFIG_ORIGEN_H |
| 10 | #define __CONFIG_ORIGEN_H |
| 11 | |
Simon Glass | be16500 | 2014-10-07 22:01:44 -0600 | [diff] [blame] | 12 | #include <configs/exynos4-common.h> |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 13 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 14 | /* High Level Configuration Options */ |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 15 | #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 16 | #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ |
| 17 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 18 | #define CONFIG_SYS_DCACHE_OFF 1 |
| 19 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 20 | /* ORIGEN has 4 bank of DRAM */ |
| 21 | #define CONFIG_NR_DRAM_BANKS 4 |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 22 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 23 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
| 24 | #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 25 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 26 | /* memtest works on */ |
| 27 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 28 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) |
| 29 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 30 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 31 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 32 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 33 | #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN |
| 34 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 35 | /* select serial console configuration */ |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 36 | #define CONFIG_SERIAL2 |
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 37 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 38 | /* Console configuration */ |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 39 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 40 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 41 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 42 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 43 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 44 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 45 | /* Power Down Modes */ |
| 46 | #define S5P_CHECK_SLEEP 0x00000BAD |
| 47 | #define S5P_CHECK_DIDLE 0xBAD00000 |
| 48 | #define S5P_CHECK_LPA 0xABAD0000 |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 49 | |
Guillaume GARDET | 0df3a9d | 2014-10-08 15:04:38 +0200 | [diff] [blame] | 50 | #define CONFIG_SUPPORT_RAW_INITRD |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 51 | |
Chander Kashyap | 488ef1a | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 52 | /* MMC SPL */ |
Chander Kashyap | 488ef1a | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 53 | #define COPY_BL2_FNPTR_ADDR 0x02020030 |
Inderpal Singh | 4a699c7 | 2013-04-04 23:09:21 +0000 | [diff] [blame] | 54 | #define CONFIG_SPL_TEXT_BASE 0x02021410 |
| 55 | |
Guillaume GARDET | 0df3a9d | 2014-10-08 15:04:38 +0200 | [diff] [blame] | 56 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 57 | "loadaddr=0x40007000\0" \ |
| 58 | "rdaddr=0x48000000\0" \ |
| 59 | "kerneladdr=0x40007000\0" \ |
| 60 | "ramdiskaddr=0x48000000\0" \ |
| 61 | "console=ttySAC2,115200n8\0" \ |
| 62 | "mmcdev=0\0" \ |
| 63 | "bootenv=uEnv.txt\0" \ |
| 64 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ |
| 65 | "importbootenv=echo Importing environment from mmc ...; " \ |
| 66 | "env import -t $loadaddr $filesize\0" \ |
| 67 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 68 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ |
| 69 | "source ${loadaddr}\0" |
| 70 | #define CONFIG_BOOTCOMMAND \ |
| 71 | "if mmc rescan; then " \ |
| 72 | "echo SD/MMC found on device ${mmcdev};" \ |
| 73 | "if run loadbootenv; then " \ |
| 74 | "echo Loaded environment from ${bootenv};" \ |
| 75 | "run importbootenv;" \ |
| 76 | "fi;" \ |
| 77 | "if test -n $uenvcmd; then " \ |
| 78 | "echo Running uenvcmd ...;" \ |
| 79 | "run uenvcmd;" \ |
| 80 | "fi;" \ |
| 81 | "if run loadbootscript; then " \ |
| 82 | "run bootscript; " \ |
| 83 | "fi; " \ |
| 84 | "fi;" \ |
| 85 | "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 86 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 87 | #define CONFIG_CLK_1000_400_200 |
| 88 | |
| 89 | /* MIU (Memory Interleaving Unit) */ |
| 90 | #define CONFIG_MIU_2BIT_21_7_INTERLEAVED |
| 91 | |
Piotr Wilczek | eb68f44 | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 92 | #define CONFIG_ENV_IS_IN_MMC |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 93 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 94 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ |
| 95 | #define RESERVE_BLOCK_SIZE (512) |
| 96 | #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ |
| 97 | #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 98 | |
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 99 | #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" |
| 100 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) |
| 101 | |
| 102 | #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 |
Chander Kashyap | 488ef1a | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 103 | |
Bin Meng | 7557405 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 104 | /* U-Boot copy size from boot Media to DRAM.*/ |
Chander Kashyap | 488ef1a | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 105 | #define COPY_BL2_SIZE 0x80000 |
| 106 | #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) |
| 107 | #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) |
Angus Ainslie | 54932fe | 2011-09-09 12:02:02 +0000 | [diff] [blame] | 108 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 109 | #endif /* __CONFIG_H */ |