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Wu, Josh3f338c12013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh3f338c12013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh3f338c12013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh3f338c12013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh3f338c12013-04-16 23:42:44 +000030
Wu, Josh3f338c12013-04-16 23:42:44 +000031/* LCD */
Wu, Josh3f338c12013-04-16 23:42:44 +000032#define LCD_BPP LCD_COLOR16
33#define LCD_OUTPUT_BPP 24
34#define CONFIG_LCD_LOGO
35#define CONFIG_LCD_INFO
36#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh3f338c12013-04-16 23:42:44 +000037#define CONFIG_ATMEL_HLCD
38#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh3f338c12013-04-16 23:42:44 +000039
Wu, Josh3f338c12013-04-16 23:42:44 +000040/*
41 * BOOTP options
42 */
43#define CONFIG_BOOTP_BOOTFILESIZE
44#define CONFIG_BOOTP_BOOTPATH
45#define CONFIG_BOOTP_GATEWAY
46#define CONFIG_BOOTP_HOSTNAME
47
Wu, Josh3f338c12013-04-16 23:42:44 +000048/*
49 * Command line configuration.
50 */
Wu, Josh3f338c12013-04-16 23:42:44 +000051#define CONFIG_CMD_NAND
Wu, Josh3f338c12013-04-16 23:42:44 +000052
53#define CONFIG_NR_DRAM_BANKS 1
54#define CONFIG_SYS_SDRAM_BASE 0x20000000
55#define CONFIG_SYS_SDRAM_SIZE 0x08000000
56
57/*
58 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
59 * leaving the correct space for initial global data structure above
60 * that address while providing maximum stack area below.
61 */
62# define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang487d1132017-04-18 14:54:51 +080063 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Wu, Josh3f338c12013-04-16 23:42:44 +000064
65/* DataFlash */
66#ifdef CONFIG_CMD_SF
Wu, Josh3f338c12013-04-16 23:42:44 +000067#define CONFIG_SF_DEFAULT_SPEED 30000000
Wu, Josh3f338c12013-04-16 23:42:44 +000068#endif
69
70/* NAND flash */
71#ifdef CONFIG_CMD_NAND
72#define CONFIG_NAND_ATMEL
73#define CONFIG_SYS_MAX_NAND_DEVICE 1
74#define CONFIG_SYS_NAND_BASE 0x40000000
75#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
76#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010077#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
78#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh3f338c12013-04-16 23:42:44 +000079
80/* PMECC & PMERRLOC */
81#define CONFIG_ATMEL_NAND_HWECC
82#define CONFIG_ATMEL_NAND_HW_PMECC
83#define CONFIG_PMECC_CAP 2
84#define CONFIG_PMECC_SECTOR_SIZE 512
85#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shen591ef582013-06-26 10:48:53 +080086
87#define CONFIG_CMD_NAND_TRIMFFS
88
Wu, Josh3f338c12013-04-16 23:42:44 +000089#endif
90
91#define CONFIG_MTD_PARTITIONS
92#define CONFIG_MTD_DEVICE
93#define CONFIG_CMD_MTDPARTS
94#define MTDIDS_DEFAULT "nand0=atmel_nand"
95#define MTDPARTS_DEFAULT \
96 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
97 "256k(env),256k(env_redundant),256k(spare)," \
98 "512k(dtb),6M(kernel)ro,-(rootfs)"
99
100#define CONFIG_EXTRA_ENV_SETTINGS \
101 "console=console=ttyS0,115200\0" \
102 "mtdparts="MTDPARTS_DEFAULT"\0" \
103 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
104 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
105
Bo Shend2c26122013-04-24 10:46:18 +0800106/* Ethernet */
107#define CONFIG_KS8851_MLL
108#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
109
Wu, Josh3f338c12013-04-16 23:42:44 +0000110#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
111
112#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
113#define CONFIG_SYS_MEMTEST_END 0x26e00000
114
Bo Shen8ed87832013-10-21 16:13:59 +0800115/* USB host */
116#ifdef CONFIG_CMD_USB
117#define CONFIG_USB_ATMEL
Bo Shen4a985df2013-10-21 16:14:00 +0800118#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shen8ed87832013-10-21 16:13:59 +0800119#define CONFIG_USB_OHCI_NEW
120#define CONFIG_SYS_USB_OHCI_CPU_INIT
121#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
122#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
123#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shen8ed87832013-10-21 16:13:59 +0800124#endif
125
Wu, Josh3f338c12013-04-16 23:42:44 +0000126#ifdef CONFIG_SYS_USE_SPIFLASH
127
128/* bootstrap + u-boot + env + linux in dataflash on CS0 */
129#define CONFIG_ENV_IS_IN_SPI_FLASH
130#define CONFIG_ENV_OFFSET 0x5000
131#define CONFIG_ENV_SIZE 0x3000
132#define CONFIG_ENV_SECT_SIZE 0x1000
133#define CONFIG_BOOTCOMMAND \
134 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
135 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
136 "bootm 0x22000000"
137
138#elif defined(CONFIG_SYS_USE_NANDFLASH)
139
140/* bootstrap + u-boot + env + linux in nandflash */
141#define CONFIG_ENV_IS_IN_NAND
Wenyou Yang487d1132017-04-18 14:54:51 +0800142#define CONFIG_ENV_OFFSET 0x120000
Wu, Josh3f338c12013-04-16 23:42:44 +0000143#define CONFIG_ENV_OFFSET_REDUND 0x100000
144#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
145#define CONFIG_BOOTCOMMAND \
146 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
147 "nand read 0x21000000 0x180000 0x080000;" \
148 "nand read 0x22000000 0x200000 0x400000;" \
149 "bootm 0x22000000 - 0x21000000"
150
151#else /* CONFIG_SYS_USE_MMC */
152
153/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh32abdfe2015-03-24 17:07:22 +0800154
155#ifdef CONFIG_ENV_IS_IN_MMC
156/* Use raw reserved sectors to save environment */
Wu, Josh3f338c12013-04-16 23:42:44 +0000157#define CONFIG_ENV_OFFSET 0x2000
158#define CONFIG_ENV_SIZE 0x1000
159#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh32abdfe2015-03-24 17:07:22 +0800160#else
161/* Use file in FAT file to save environment */
162#define CONFIG_ENV_IS_IN_FAT
Wu, Josh32abdfe2015-03-24 17:07:22 +0800163#define FAT_ENV_INTERFACE "mmc"
164#define FAT_ENV_FILE "uboot.env"
165#define FAT_ENV_DEVICE_AND_PART "0"
166#define CONFIG_ENV_SIZE 0x4000
167#endif
168
Wu, Josh3f338c12013-04-16 23:42:44 +0000169#define CONFIG_BOOTCOMMAND \
170 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
171 "fatload mmc 0:1 0x21000000 dtb;" \
172 "fatload mmc 0:1 0x22000000 uImage;" \
173 "bootm 0x22000000 - 0x21000000"
174
175#endif
176
Wu, Josh3f338c12013-04-16 23:42:44 +0000177#define CONFIG_SYS_CBSIZE 256
178#define CONFIG_SYS_MAXARGS 16
Wu, Josh3f338c12013-04-16 23:42:44 +0000179#define CONFIG_SYS_LONGHELP
180#define CONFIG_CMDLINE_EDITING
181#define CONFIG_AUTO_COMPLETE
Wu, Josh3f338c12013-04-16 23:42:44 +0000182
183/*
184 * Size of malloc() pool
185 */
186#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shen9c709392015-03-27 14:23:36 +0800187
188/* SPL */
189#define CONFIG_SPL_FRAMEWORK
190#define CONFIG_SPL_TEXT_BASE 0x300000
191#define CONFIG_SPL_MAX_SIZE 0x6000
192#define CONFIG_SPL_STACK 0x308000
193
194#define CONFIG_SPL_BSS_START_ADDR 0x20000000
195#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
196#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
197#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
198
Bo Shen9c709392015-03-27 14:23:36 +0800199#define CONFIG_SYS_MONITOR_LEN (512 << 10)
200
201#define CONFIG_SYS_MASTER_CLOCK 132096000
202#define CONFIG_SYS_AT91_PLLA 0x20953f03
203#define CONFIG_SYS_MCKR 0x1301
204#define CONFIG_SYS_MCKR_CSS 0x1302
205
Bo Shen9c709392015-03-27 14:23:36 +0800206#ifdef CONFIG_SYS_USE_MMC
207#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shen9c709392015-03-27 14:23:36 +0800208#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
209#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen9c709392015-03-27 14:23:36 +0800210
211#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800212#define CONFIG_SPL_NAND_DRIVERS
213#define CONFIG_SPL_NAND_BASE
214#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
215#define CONFIG_SYS_NAND_5_ADDR_CYCLE
216#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
217#define CONFIG_SYS_NAND_PAGE_COUNT 64
218#define CONFIG_SYS_NAND_OOBSIZE 64
219#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
220#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
221#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
222
223#elif CONFIG_SYS_USE_SPIFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800224#define CONFIG_SPL_SPI_LOAD
225#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
226
227#endif
Wu, Josh3f338c12013-04-16 23:42:44 +0000228
229#endif