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Sedji Gaouaou538566d2009-07-09 10:16:29 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Sedji Gaouaou538566d2009-07-09 10:16:29 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Sedji Gaouaou538566d2009-07-09 10:16:29 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Thomas Petazzonia5e85762011-08-04 11:08:50 +000014#include <asm/hardware.h>
15
Bo Shen337a2d82013-08-13 14:50:49 +080016#define CONFIG_SYS_TEXT_BASE 0x73f00000
17
Thomas Petazzonia5e85762011-08-04 11:08:50 +000018#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Jens Scharsig128ecd02010-02-03 22:45:42 +010019
Sedji Gaouaou538566d2009-07-09 10:16:29 +020020/* ARM asynchronous clock */
Thomas Petazzonia5e85762011-08-04 11:08:50 +000021#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
22#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Sedji Gaouaou538566d2009-07-09 10:16:29 +020023
Thomas Petazzonia5e85762011-08-04 11:08:50 +000024#define CONFIG_AT91SAM9M10G45EK
Sedji Gaouaou538566d2009-07-09 10:16:29 +020025
Thomas Petazzonia5e85762011-08-04 11:08:50 +000026#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
Sedji Gaouaou538566d2009-07-09 10:16:29 +020029#define CONFIG_SKIP_LOWLEVEL_INIT
Thomas Petazzonia5e85762011-08-04 11:08:50 +000030
31/* general purpose I/O */
32#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Thomas Petazzonia5e85762011-08-04 11:08:50 +000033
Sedji Gaouaou538566d2009-07-09 10:16:29 +020034/* LCD */
Sedji Gaouaou538566d2009-07-09 10:16:29 +020035#define LCD_BPP LCD_COLOR8
Thomas Petazzonia5e85762011-08-04 11:08:50 +000036#define CONFIG_LCD_LOGO
Sedji Gaouaou538566d2009-07-09 10:16:29 +020037#undef LCD_TEST_PATTERN
Thomas Petazzonia5e85762011-08-04 11:08:50 +000038#define CONFIG_LCD_INFO
39#define CONFIG_LCD_INFO_BELOW_LOGO
Thomas Petazzonia5e85762011-08-04 11:08:50 +000040#define CONFIG_ATMEL_LCD
41#define CONFIG_ATMEL_LCD_RGB565
Sedji Gaouaou538566d2009-07-09 10:16:29 +020042/* board specific(not enough SRAM) */
43#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
44
Sedji Gaouaou538566d2009-07-09 10:16:29 +020045/*
46 * BOOTP options
47 */
Thomas Petazzonia5e85762011-08-04 11:08:50 +000048#define CONFIG_BOOTP_BOOTFILESIZE
49#define CONFIG_BOOTP_BOOTPATH
50#define CONFIG_BOOTP_GATEWAY
51#define CONFIG_BOOTP_HOSTNAME
Sedji Gaouaou538566d2009-07-09 10:16:29 +020052
53/*
54 * Command line configuration.
55 */
Bo Shene17fe3a2013-11-20 11:17:16 +080056
Thomas Petazzonia5e85762011-08-04 11:08:50 +000057#define CONFIG_CMD_NAND
Sedji Gaouaou538566d2009-07-09 10:16:29 +020058
59/* SDRAM */
60#define CONFIG_NR_DRAM_BANKS 1
Thomas Petazzonia5e85762011-08-04 11:08:50 +000061#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
62#define CONFIG_SYS_SDRAM_SIZE 0x08000000
Sedji Gaouaou538566d2009-07-09 10:16:29 +020063
Thomas Petazzonia5e85762011-08-04 11:08:50 +000064#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang269c9d12017-04-18 15:15:48 +080065 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Sedji Gaouaou538566d2009-07-09 10:16:29 +020066
Sedji Gaouaou538566d2009-07-09 10:16:29 +020067/* NAND flash */
68#ifdef CONFIG_CMD_NAND
Sedji Gaouaou538566d2009-07-09 10:16:29 +020069#define CONFIG_NAND_ATMEL
70#define CONFIG_SYS_MAX_NAND_DEVICE 1
Thomas Petazzonia5e85762011-08-04 11:08:50 +000071#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
72#define CONFIG_SYS_NAND_DBW_8
Sedji Gaouaou538566d2009-07-09 10:16:29 +020073/* our ALE is AD21 */
74#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
75/* our CLE is AD22 */
76#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
77#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
78#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
Wolfgang Denk1f797742009-07-18 21:52:24 +020079
Sedji Gaouaou538566d2009-07-09 10:16:29 +020080#endif
81
82/* Ethernet */
Thomas Petazzonia5e85762011-08-04 11:08:50 +000083#define CONFIG_RESET_PHY_R
Heiko Schocher8a84ae12013-11-18 08:07:23 +010084#define CONFIG_AT91_WANTS_COMMON_PHY
Sedji Gaouaou538566d2009-07-09 10:16:29 +020085
Thomas Petazzonia5e85762011-08-04 11:08:50 +000086#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Sedji Gaouaou538566d2009-07-09 10:16:29 +020087
Thomas Petazzonia5e85762011-08-04 11:08:50 +000088#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
89#define CONFIG_SYS_MEMTEST_END 0x23e00000
Sedji Gaouaou538566d2009-07-09 10:16:29 +020090
Wu, Joshde85ca62014-05-21 10:42:16 +080091#ifdef CONFIG_SYS_USE_NANDFLASH
Thomas Petazzonia5e85762011-08-04 11:08:50 +000092/* bootstrap + u-boot + env in nandflash */
93#define CONFIG_ENV_IS_IN_NAND
Wenyou Yang269c9d12017-04-18 15:15:48 +080094#define CONFIG_ENV_OFFSET 0x120000
Bo Shena8fd0632013-02-20 00:16:25 +000095#define CONFIG_ENV_OFFSET_REDUND 0x100000
Thomas Petazzonia5e85762011-08-04 11:08:50 +000096#define CONFIG_ENV_SIZE 0x20000
Sedji Gaouaou538566d2009-07-09 10:16:29 +020097
Bo Shena8fd0632013-02-20 00:16:25 +000098#define CONFIG_BOOTCOMMAND \
99 "nand read 0x70000000 0x200000 0x300000;" \
Thomas Petazzonia5e85762011-08-04 11:08:50 +0000100 "bootm 0x70000000"
101#define CONFIG_BOOTARGS \
102 "console=ttyS0,115200 earlyprintk " \
Bo Shena8fd0632013-02-20 00:16:25 +0000103 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
104 "256k(env),256k(env_redundant),256k(spare)," \
105 "512k(dtb),6M(kernel)ro,-(rootfs) " \
106 "root=/dev/mtdblock7 rw rootfstype=jffs2"
Wu, Joshde85ca62014-05-21 10:42:16 +0800107#elif CONFIG_SYS_USE_MMC
108/* bootstrap + u-boot + env + linux in mmc */
109#define FAT_ENV_INTERFACE "mmc"
Wu, Josh9b899f22014-06-24 17:31:02 +0800110/*
111 * We don't specify the part number, if device 0 has partition table, it means
112 * the first partition; it no partition table, then take whole device as a
113 * FAT file system.
114 */
115#define FAT_ENV_DEVICE_AND_PART "0"
Wu, Joshde85ca62014-05-21 10:42:16 +0800116#define FAT_ENV_FILE "uboot.env"
117#define CONFIG_ENV_IS_IN_FAT
Wu, Joshde85ca62014-05-21 10:42:16 +0800118#define CONFIG_ENV_SIZE 0x4000
119
120#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
121 "mtdparts=atmel_nand:" \
122 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
123 "root=/dev/mmcblk0p2 rw rootwait"
124#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
125 "fatload mmc 0:1 0x72000000 zImage; " \
126 "bootz 0x72000000 - 0x71000000"
127#endif
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200128
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200129#define CONFIG_SYS_CBSIZE 256
130#define CONFIG_SYS_MAXARGS 16
Thomas Petazzonia5e85762011-08-04 11:08:50 +0000131#define CONFIG_SYS_LONGHELP
132#define CONFIG_CMDLINE_EDITING
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200133#define CONFIG_AUTO_COMPLETE
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200134
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200135/*
136 * Size of malloc() pool
137 */
138#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200139
Bo Shenc56e9f42015-03-27 14:23:34 +0800140/* Defines for SPL */
141#define CONFIG_SPL_FRAMEWORK
142#define CONFIG_SPL_TEXT_BASE 0x300000
143#define CONFIG_SPL_MAX_SIZE 0x010000
144#define CONFIG_SPL_STACK 0x310000
145
Bo Shenc56e9f42015-03-27 14:23:34 +0800146#define CONFIG_SYS_MONITOR_LEN 0x80000
147
148#ifdef CONFIG_SYS_USE_MMC
149
150#define CONFIG_SPL_BSS_START_ADDR 0x70000000
151#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
152#define CONFIG_SYS_SPL_MALLOC_START 0x70080000
153#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
154
155#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shenc56e9f42015-03-27 14:23:34 +0800156#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
157#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shenc56e9f42015-03-27 14:23:34 +0800158
159#elif CONFIG_SYS_USE_NANDFLASH
Bo Shenc56e9f42015-03-27 14:23:34 +0800160#define CONFIG_SPL_NAND_DRIVERS
161#define CONFIG_SPL_NAND_BASE
162#define CONFIG_SPL_NAND_ECC
163#define CONFIG_SPL_NAND_SOFTECC
164#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
165#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
166#define CONFIG_SYS_NAND_5_ADDR_CYCLE
167
168#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
169#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
170#define CONFIG_SYS_NAND_PAGE_COUNT 64
171#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
172#define CONFIG_SYS_NAND_ECCSIZE 256
173#define CONFIG_SYS_NAND_ECCBYTES 3
174#define CONFIG_SYS_NAND_OOBSIZE 64
175#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
176 48, 49, 50, 51, 52, 53, 54, 55, \
177 56, 57, 58, 59, 60, 61, 62, 63, }
178#endif
179
180#define CONFIG_SPL_ATMEL_SIZE
181#define CONFIG_SYS_MASTER_CLOCK 132096000
182#define CONFIG_SYS_AT91_PLLA 0x20c73f03
183#define CONFIG_SYS_MCKR 0x1301
184#define CONFIG_SYS_MCKR_CSS 0x1302
185
Sedji Gaouaou538566d2009-07-09 10:16:29 +0200186#endif