blob: 87ba849c1c4e58efa515cc947742eeb8970b180a [file] [log] [blame]
Simon Glass4a56f102015-01-27 22:13:47 -07001/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <mmc.h>
9#include <pci_ids.h>
Bin Meng947391c2015-07-30 03:49:18 -070010#include <asm/irq.h>
Bin Mengdc597802015-10-11 21:37:43 -070011#include <asm/mrccache.h>
Simon Glass4a56f102015-01-27 22:13:47 -070012#include <asm/post.h>
13
14static struct pci_device_id mmc_supported[] = {
Stefan Roese555c6822016-09-26 10:18:07 +020015 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
16 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
17 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
Simon Glass0b619282015-11-29 13:18:08 -070018 {},
Simon Glass4a56f102015-01-27 22:13:47 -070019};
20
21int cpu_mmc_init(bd_t *bis)
22{
Simon Glass0b619282015-11-29 13:18:08 -070023 return pci_mmc_init("ValleyView SDHCI", mmc_supported);
Simon Glass4a56f102015-01-27 22:13:47 -070024}
25
Simon Glassa815df72015-08-04 12:34:02 -060026#ifndef CONFIG_EFI_APP
Simon Glass4a56f102015-01-27 22:13:47 -070027int arch_cpu_init(void)
28{
Simon Glass4a56f102015-01-27 22:13:47 -070029 post_code(POST_CPU_INIT);
Simon Glass4a56f102015-01-27 22:13:47 -070030
Masahiro Yamada17103212016-09-06 22:17:36 +090031 return x86_cpu_init_f();
Simon Glass4a56f102015-01-27 22:13:47 -070032}
Bin Meng947391c2015-07-30 03:49:18 -070033
34int arch_misc_init(void)
35{
Simon Glass5cc82b82015-08-10 07:05:12 -060036 if (!ll_boot_init())
37 return 0;
Simon Glass888697a2015-08-10 07:05:10 -060038
Bin Mengdc597802015-10-11 21:37:43 -070039#ifdef CONFIG_ENABLE_MRC_CACHE
40 /*
41 * We intend not to check any return value here, as even MRC cache
42 * is not saved successfully, it is not a severe error that will
43 * prevent system from continuing to boot.
44 */
45 mrccache_save();
46#endif
47
Simon Glass754f55e2016-01-19 21:32:26 -070048 return 0;
Bin Meng947391c2015-07-30 03:49:18 -070049}
Bin Mengdc597802015-10-11 21:37:43 -070050
Simon Glassa815df72015-08-04 12:34:02 -060051#endif
Bin Meng71d7c2f2015-10-11 21:37:45 -070052
53void reset_cpu(ulong addr)
54{
55 /* cold reset */
56 x86_full_reset();
57}