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git01.mediatek.com / filogic / uboot / 551bfb91320b8944fe7e3687b01ffe0c01021ece / . / arch / arm / dts / tegra20-ventana.dts
blob: 1a526bab641f61166889e2be102ec971510b7c17 [file] [log] [blame]
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrenf6236152013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]4
5/ {
Allen Martin55d98a12012-08-31 08:30:00 +0000[diff] [blame]6 model = "NVIDIA Tegra20 Ventana evaluation board";
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]7 compatible = "nvidia,ventana", "nvidia,tegra20";
8
9 aliases {
10 usb0 = "/usb@c5008000";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]11 sdhci0 = "/sdhci@c8000600";
12 sdhci1 = "/sdhci@c8000400";
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]13 };
14
15 memory {
16 reg = <0x00000000 0x40000000>;
17 };
18
Stephen Warrenc3836f32013-06-18 09:46:52 -0600[diff] [blame]19 host1x {
20 status = "okay";
21 dc@54200000 {
22 status = "okay";
23 rgb {
24 status = "okay";
25 nvidia,panel = <&lcd_panel>;
26 };
27 };
28 };
29
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]30 serial@70006300 {
31 clock-frequency = < 216000000 >;
32 };
33
34 i2c@7000c000 {
35 status = "disabled";
36 };
37
38 i2c@7000c400 {
39 status = "disabled";
40 };
41
42 i2c@7000c500 {
43 status = "disabled";
44 };
45
46 i2c@7000d000 {
47 status = "disabled";
48 };
49
50 usb@c5000000 {
51 status = "disabled";
52 };
53
54 usb@c5004000 {
55 status = "disabled";
56 };
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]57
58 sdhci@c8000400 {
59 status = "okay";
60 cd-gpios = <&gpio 69 1>; /* gpio PI5 */
61 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
62 power-gpios = <&gpio 70 0>; /* gpio PI6 */
63 bus-width = <4>;
64 };
65
66 sdhci@c8000600 {
67 status = "okay";
68 bus-width = <8>;
69 };
Stephen Warrenc3836f32013-06-18 09:46:52 -0600[diff] [blame]70
71 lcd_panel: panel {
72 clock = <72072000>;
73 xres = <1366>;
74 yres = <768>;
75 left-margin = <58>;
76 right-margin = <58>;
77 hsync-len = <58>;
78 lower-margin = <4>;
79 upper-margin = <4>;
80 vsync-len = <4>;
81 hsync-active-high;
82 vsync-active-high;
83 nvidia,bits-per-pixel = <16>;
84 nvidia,pwm = <&pwm 2 0>;
85 nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
86 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
87 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
88 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
89 nvidia,panel-timings = <0 0 200 0 0>;
90 };
Stephen Warren82252762012-05-23 07:46:15 +0000[diff] [blame]91};