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Stefan Roese93e6bf42014-10-22 12:13:17 +02001/*
2 * (C) Copyright 2011
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Lei Wen <leiwen@marvell.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9/*
10 * This file should be included in board config header file.
11 *
Stefan Roese7cd34842015-04-25 06:29:49 +020012 * It supports common definitions for MVEBU platforms
Stefan Roese93e6bf42014-10-22 12:13:17 +020013 */
14
Stefan Roeseebda3ec2015-04-25 06:29:47 +020015#ifndef _MVEBU_CONFIG_H
16#define _MVEBU_CONFIG_H
Stefan Roese93e6bf42014-10-22 12:13:17 +020017
18#include <asm/arch/soc.h>
19
Stefan Roese479f9af2016-02-10 07:23:00 +010020#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
21 || defined(CONFIG_ARMADA_38X)
Stefan Roeseeb083e52015-12-21 13:56:33 +010022/*
23 * Set this for the common xor register definitions needed in dram.c
24 * for A38x as well here.
25 */
Stefan Roese93e6bf42014-10-22 12:13:17 +020026#define MV88F78X60 /* for the DDR training bin_hdr code */
Stefan Roese7cd34842015-04-25 06:29:49 +020027#endif
Stefan Roese93e6bf42014-10-22 12:13:17 +020028
29#define CONFIG_SYS_CACHELINE_SIZE 32
30
Stefan Roesec14c93f2015-11-18 12:44:29 +010031#define CONFIG_SYS_L2_PL310
32
33#ifdef CONFIG_SPL_BUILD
34#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
35#endif
36
Stefan Roese93e6bf42014-10-22 12:13:17 +020037/*
38 * By default kwbimage.cfg from board specific folder is used
39 * If for some board, different configuration file need to be used,
40 * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
41 */
42#ifndef CONFIG_SYS_KWD_CONFIG
43#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
44#endif /* CONFIG_SYS_KWD_CONFIG */
45
46/* Add target to build it automatically upon "make" */
Stefan Roesea4fc5d42015-01-19 11:33:49 +010047#ifdef CONFIG_SPL
48#define CONFIG_BUILD_TARGET "u-boot-spl.kwb"
Stefan Roesea4fc5d42015-01-19 11:33:49 +010049#endif
Stefan Roese93e6bf42014-10-22 12:13:17 +020050
51/* end of 16M scrubbed by training in bootrom */
52#define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000
53#define CONFIG_NR_DRAM_BANKS_MAX 2
54
55#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
56
57/*
58 * SPI Flash configuration
59 */
60#ifdef CONFIG_CMD_SF
Stefan Roese49e7d772015-11-20 13:51:57 +010061#define CONFIG_KIRKWOOD_SPI
Stefan Roese93e6bf42014-10-22 12:13:17 +020062#ifndef CONFIG_ENV_SPI_BUS
63# define CONFIG_ENV_SPI_BUS 0
64#endif
65#ifndef CONFIG_ENV_SPI_CS
66# define CONFIG_ENV_SPI_CS 0
67#endif
68#ifndef CONFIG_ENV_SPI_MAX_HZ
69# define CONFIG_ENV_SPI_MAX_HZ 50000000
70#endif
71#endif
72
Stefan Roese49e7d772015-11-20 13:51:57 +010073/* Needed for SPI NOR booting in SPL */
74#define CONFIG_DM_SEQ_ALIAS 1
75
Stefan Roese93e6bf42014-10-22 12:13:17 +020076/*
77 * Ethernet Driver configuration
78 */
79#ifdef CONFIG_CMD_NET
Stefan Roese93e6bf42014-10-22 12:13:17 +020080#define CONFIG_MII /* expose smi ove miiphy interface */
Stefan Roese479f9af2016-02-10 07:23:00 +010081#if !defined(CONFIG_ARMADA_375)
Stefan Roese93e6bf42014-10-22 12:13:17 +020082#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
83#define CONFIG_PHYLIB
Stefan Roese479f9af2016-02-10 07:23:00 +010084#endif
Stefan Roese93e6bf42014-10-22 12:13:17 +020085#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
86#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
Stefan Roeseb3efc572015-11-24 09:15:22 +010087#define CONFIG_ARP_TIMEOUT 200
88#define CONFIG_NET_RETRY_COUNT 50
Stefan Roese93e6bf42014-10-22 12:13:17 +020089#endif /* CONFIG_CMD_NET */
90
91/*
92 * I2C related stuff
93 */
94#ifdef CONFIG_CMD_I2C
95#ifndef CONFIG_SYS_I2C_SOFT
96#define CONFIG_I2C_MVTWSI
97#endif
98#define CONFIG_SYS_I2C_SLAVE 0x0
99#define CONFIG_SYS_I2C_SPEED 100000
100#endif
101
Stefan Roese64174892015-10-22 12:36:31 +0200102/* Use common timer */
103#define CONFIG_SYS_TIMER_COUNTS_DOWN
104#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
105#define CONFIG_SYS_TIMER_RATE 25000000
106
Stefan Roeseebda3ec2015-04-25 06:29:47 +0200107#endif /* __MVEBU_CONFIG_H */