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Fabio Estevam77e62892012-09-13 03:18:20 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam77e62892012-09-13 03:18:20 +00007 */
8
Fabio Estevamc1239082017-06-01 12:59:52 -03009#ifndef __MX6SABRESD_CONFIG_H
10#define __MX6SABRESD_CONFIG_H
Fabio Estevam77e62892012-09-13 03:18:20 +000011
John Tobias7706eae2014-11-12 14:27:44 -080012#ifdef CONFIG_SPL
John Tobias7706eae2014-11-12 14:27:44 -080013#include "imx6_spl.h"
14#endif
15
Fabio Estevam77e62892012-09-13 03:18:20 +000016#define CONFIG_MACH_TYPE 3980
Fabio Estevamc5ca8972012-09-24 08:09:32 +000017#define CONFIG_MXC_UART_BASE UART1_BASE
Simon Glass4694a742016-10-17 20:12:39 -060018#define CONSOLE_DEV "ttymxc0"
Fabio Estevam77e62892012-09-13 03:18:20 +000019
Otavio Salvador134629c2014-01-06 13:27:20 -020020#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
21
Pierre Aubertec10aed2013-06-04 09:00:15 +020022#include "mx6sabre_common.h"
Otavio Salvador1c0b9be2012-09-26 11:37:01 +000023
Diego Dorta466016e2016-10-11 11:09:27 -030024/* Falcon Mode */
Tom Rini133b2e22017-01-20 19:55:53 -050025#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
26#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
Diego Dorta466016e2016-10-11 11:09:27 -030027#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
Diego Dorta466016e2016-10-11 11:09:27 -030028
29/* Falcon Mode - MMC support: args@1MB kernel@2MB */
30#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
31#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
32#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
33
Shawn Guo7e5e8332012-12-30 14:14:59 +000034#define CONFIG_SYS_FSL_USDHC_NUM 3
35#if defined(CONFIG_ENV_IS_IN_MMC)
Fabio Estevam3cce37d2013-01-10 09:00:53 +000036#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
Shawn Guo7e5e8332012-12-30 14:14:59 +000037#endif
38
Marek Vasut0e99f012014-03-23 22:45:41 +010039#ifdef CONFIG_CMD_PCI
Marek Vasut0e99f012014-03-23 22:45:41 +010040#define CONFIG_PCI_SCAN_SHOW
41#define CONFIG_PCIE_IMX
42#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
43#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
44#endif
45
Fabio Estevamba92ad62014-05-09 13:15:42 -030046/* I2C Configs */
Fabio Estevamba92ad62014-05-09 13:15:42 -030047#define CONFIG_SYS_I2C
48#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020049#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
50#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070051#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevamba92ad62014-05-09 13:15:42 -030052#define CONFIG_SYS_I2C_SPEED 100000
53
54/* PMIC */
55#define CONFIG_POWER
56#define CONFIG_POWER_I2C
57#define CONFIG_POWER_PFUZE100
58#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
59
Peng Fanc9498fa2014-12-02 09:55:27 +080060/* USB Configs */
Peng Fanc9498fa2014-12-02 09:55:27 +080061#ifdef CONFIG_CMD_USB
Peng Fanc9498fa2014-12-02 09:55:27 +080062#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
63#define CONFIG_USB_HOST_ETHER
64#define CONFIG_USB_ETHER_ASIX
65#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
66#define CONFIG_MXC_USB_FLAGS 0
67#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
68#endif
69
Fabio Estevamc1239082017-06-01 12:59:52 -030070#endif /* __MX6SABRESD_CONFIG_H */