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Heiko Schocherc8f51122010-03-05 07:36:33 +01001/*
2 * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
3 *
4 * based on:
5 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef __IMX27LITE_COMMON_CONFIG_H
24#define __IMX27LITE_COMMON_CONFIG_H
25
26/*
27 * SoC Configuration
28 */
29#define CONFIG_ARM926EJS /* arm926ejs CPU core */
30#define CONFIG_MX27
31#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
32#define CONFIG_SYS_HZ 1000
33
34#define CONFIG_DISPLAY_BOARDINFO
35#define CONFIG_DISPLAY_CPUINFO
36
37#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38#define CONFIG_SETUP_MEMORY_TAGS 1
39#define CONFIG_INITRD_TAG 1
40
41/*
42 * Lowlevel configuration
43 */
44#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
45 (ESDCFG_TRC(10) | \
46 ESDCFG_TRCD(3) | \
47 ESDCFG_TCAS(cas) | \
48 ESDCFG_TRRD(1) | \
49 ESDCFG_TRAS(5) | \
50 ESDCFG_TWR | \
51 ESDCFG_TMRD(2) | \
52 ESDCFG_TRP(2) | \
53 ESDCFG_TXP(3))
54
55#define SDRAM_ESDCTL_REGISTER_VAL \
56 (ESDCTL_PRCT(0) | \
57 ESDCTL_BL | \
58 ESDCTL_PWDT(0) | \
59 ESDCTL_SREFR(3) | \
60 ESDCTL_DSIZ_32 | \
61 ESDCTL_COL10 | \
62 ESDCTL_ROW13 | \
63 ESDCTL_SDE)
64
65#define SDRAM_ALL_VAL 0xf00
66
67#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
68#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
69
70#define MPCTL0_VAL 0x1ef15d5
71
72#define SPCTL0_VAL 0x043a1c09
73
74#define CSCR_VAL 0x33f08107
75
76#define PCDR0_VAL 0x120470c3
77#define PCDR1_VAL 0x03030303
78#define PCCR0_VAL 0xffffffff
79#define PCCR1_VAL 0xfffffffc
80
81#define AIPI1_PSR0_VAL 0x20040304
82#define AIPI1_PSR1_VAL 0xdffbfcfb
83#define AIPI2_PSR0_VAL 0x07ffc200
84#define AIPI2_PSR1_VAL 0xffffffff
85
86/*
87 * Memory Info
88 */
89/* malloc() len */
90#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
91/* reserved for initial data */
92#define CONFIG_SYS_GBL_DATA_SIZE 128
93/* memtest start address */
94#define CONFIG_SYS_MEMTEST_START 0xA0000000
95#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
96#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
97#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
98#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
99#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
100
101/*
102 * Serial Driver info
103 */
104#define CONFIG_MXC_UART
105#define CONFIG_SYS_MX27_UART1
106#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
107#define CONFIG_BAUDRATE 115200 /* Default baud rate */
108#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
109
110/*
111 * Flash & Environment
112 */
113#define CONFIG_ENV_IS_IN_FLASH
114#define CONFIG_FLASH_CFI_DRIVER
115#define CONFIG_SYS_FLASH_CFI
116/* Use buffered writes (~10x faster) */
117#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
118/* Use hardware sector protection */
119#define CONFIG_SYS_FLASH_PROTECTION 1
120#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
121/* CS2 Base address */
122#define PHYS_FLASH_1 0xc0000000
123/* Flash Base for U-Boot */
124#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
125#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
126 CONFIG_SYS_FLASH_SECT_SZ)
127#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
128#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
129#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
130/* Address and size of Redundant Environment Sector */
131#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
132#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
133
134/*
135 * Ethernet
136 */
137#define CONFIG_FEC_MXC
138#define CONFIG_FEC_MXC_PHYADDR 0x1f
139#define CONFIG_MII
140#define CONFIG_NET_MULTI
141
142/*
143 * MTD
144 */
145#define CONFIG_FLASH_CFI_MTD
146#define CONFIG_MTD_DEVICE
147
148/*
149 * NAND
150 */
151#define CONFIG_NAND_MXC
152#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
153#define CONFIG_SYS_MAX_NAND_DEVICE 1
154#define CONFIG_SYS_NAND_BASE 0xd8000000
155#define CONFIG_JFFS2_NAND
156#define CONFIG_MXC_NAND_HWECC
157#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
158
159/*
160 * SD/MMC
161 */
162#define CONFIG_MMC
163#define CONFIG_GENERIC_MMC
164#define CONFIG_MXC_MMC
165#define CONFIG_DOS_PARTITION
166
167/*
168 * MTD partitions
169 */
170#define CONFIG_CMD_MTDPARTS
171
172/*
173 * U-Boot general configuration
174 */
175#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
176#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
177/* Print buffer sz */
178#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
179 sizeof(CONFIG_SYS_PROMPT) + 16)
180#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
181/* Boot Argument Buffer Size */
182#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
183#define CONFIG_CMDLINE_EDITING
184#define CONFIG_SYS_LONGHELP
185
186/*
187 * U-Boot commands
188 */
189#include <config_cmd_default.h>
190#define CONFIG_CMD_ASKENV
Heiko Schocher54433092010-09-17 13:10:30 +0200191#define CONFIG_CMD_CACHE
Heiko Schocherc8f51122010-03-05 07:36:33 +0100192#define CONFIG_CMD_DHCP
193#define CONFIG_CMD_DIAG
194#define CONFIG_CMD_FAT
195#define CONFIG_CMD_JFFS2
196#define CONFIG_CMD_MII
197#define CONFIG_CMD_MMC
198#define CONFIG_CMD_NAND
199#define CONFIG_CMD_PING
200
201#define CONFIG_BOOTDELAY 5
202
203#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
204#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
205
206#define xstr(s) str(s)
207#define str(s) #s
208
209#define CONFIG_EXTRA_ENV_SETTINGS \
210 "netdev=eth0\0" \
211 "nfsargs=setenv bootargs root=/dev/nfs rw " \
212 "nfsroot=${serverip}:${rootpath}\0" \
213 "ramargs=setenv bootargs root=/dev/ram rw\0" \
214 "addip=setenv bootargs ${bootargs} " \
215 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
216 ":${hostname}:${netdev}:off panic=1\0" \
217 "addtty=setenv bootargs ${bootargs}" \
218 " console=ttymxc0,${baudrate}\0" \
219 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
220 "addmisc=setenv bootargs ${bootargs}\0" \
221 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
222 "kernel_addr_r=a0800000\0" \
223 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
224 "rootpath=/opt/eldk-4.2-arm/arm\0" \
225 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
226 "run nfsargs addip addtty addmtd addmisc;" \
227 "bootm\0" \
228 "bootcmd=run net_nfs\0" \
229 "load=tftp ${loadaddr} ${u-boot}\0" \
230 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
231 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
232 " +${filesize};cp.b ${fileaddr} " \
233 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
234 "upd=run load update\0" \
235 "mtdids=" MTDIDS_DEFAULT "\0" \
236 "mtdparts=" MTDPARTS_DEFAULT "\0" \
237
238#endif /* __IMX27LITE_COMMON_CONFIG_H */