Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2009 |
| 4 | * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> |
| 5 | * |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 6 | * Copyright (C) 2011 |
| 7 | * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 8 | */ |
| 9 | #include <common.h> |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 10 | #include <errno.h> |
| 11 | #include <dm.h> |
| 12 | #include <malloc.h> |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 13 | #include <asm/arch/imx-regs.h> |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 14 | #include <asm/gpio.h> |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 15 | #include <asm/io.h> |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 16 | #include <dt-structs.h> |
| 17 | #include <mapmem.h> |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 18 | |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 19 | enum mxc_gpio_direction { |
| 20 | MXC_GPIO_DIRECTION_IN, |
| 21 | MXC_GPIO_DIRECTION_OUT, |
| 22 | }; |
| 23 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 24 | #define GPIO_PER_BANK 32 |
| 25 | |
| 26 | struct mxc_gpio_plat { |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 27 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
| 28 | /* Put this first since driver model will copy the data here */ |
| 29 | struct dtd_gpio_mxc dtplat; |
| 30 | #endif |
Peng Fan | 86be426 | 2015-02-10 14:46:33 +0800 | [diff] [blame] | 31 | int bank_index; |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 32 | struct gpio_regs *regs; |
| 33 | }; |
| 34 | |
| 35 | struct mxc_bank_info { |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 36 | struct gpio_regs *regs; |
| 37 | }; |
| 38 | |
Simon Glass | fa4689a | 2019-12-06 21:41:35 -0700 | [diff] [blame] | 39 | #if !CONFIG_IS_ENABLED(DM_GPIO) |
Lukasz Majewski | c00b093 | 2019-06-09 22:54:40 +0200 | [diff] [blame] | 40 | #define GPIO_TO_PORT(n) ((n) / 32) |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 41 | |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 42 | /* GPIO port description */ |
| 43 | static unsigned long gpio_ports[] = { |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 44 | [0] = GPIO1_BASE_ADDR, |
| 45 | [1] = GPIO2_BASE_ADDR, |
| 46 | [2] = GPIO3_BASE_ADDR, |
trem | cf233ed | 2012-08-25 05:30:33 +0000 | [diff] [blame] | 47 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
Adrian Alonso | 840d2e3 | 2015-08-11 11:19:51 -0500 | [diff] [blame] | 48 | defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 49 | defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \ |
Giulio Benetti | a82cd87 | 2020-01-10 15:47:03 +0100 | [diff] [blame] | 50 | defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050) |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 51 | [3] = GPIO4_BASE_ADDR, |
| 52 | #endif |
Adrian Alonso | 840d2e3 | 2015-08-11 11:19:51 -0500 | [diff] [blame] | 53 | #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 54 | defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \ |
Giulio Benetti | a82cd87 | 2020-01-10 15:47:03 +0100 | [diff] [blame] | 55 | defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050) |
Liu Hui-R64343 | a71164c | 2011-01-03 22:27:38 +0000 | [diff] [blame] | 56 | [4] = GPIO5_BASE_ADDR, |
Giulio Benetti | a82cd87 | 2020-01-10 15:47:03 +0100 | [diff] [blame] | 57 | #if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \ |
| 58 | defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT1050)) |
Liu Hui-R64343 | a71164c | 2011-01-03 22:27:38 +0000 | [diff] [blame] | 59 | [5] = GPIO6_BASE_ADDR, |
trem | cf233ed | 2012-08-25 05:30:33 +0000 | [diff] [blame] | 60 | #endif |
Peng Fan | f5dd87e | 2015-07-20 19:28:31 +0800 | [diff] [blame] | 61 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 62 | #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ |
| 63 | defined(CONFIG_ARCH_IMX8) |
Fabio Estevam | 1b691df | 2018-01-03 12:33:05 -0200 | [diff] [blame] | 64 | #if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) |
Liu Hui-R64343 | a71164c | 2011-01-03 22:27:38 +0000 | [diff] [blame] | 65 | [6] = GPIO7_BASE_ADDR, |
| 66 | #endif |
Peng Fan | f5dd87e | 2015-07-20 19:28:31 +0800 | [diff] [blame] | 67 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 68 | #if defined(CONFIG_ARCH_IMX8) |
| 69 | [7] = GPIO8_BASE_ADDR, |
| 70 | #endif |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 71 | }; |
| 72 | |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 73 | static int mxc_gpio_direction(unsigned int gpio, |
| 74 | enum mxc_gpio_direction direction) |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 75 | { |
Vikram Narayanan | fbdf6bc | 2012-04-10 04:26:20 +0000 | [diff] [blame] | 76 | unsigned int port = GPIO_TO_PORT(gpio); |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 77 | struct gpio_regs *regs; |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 78 | u32 l; |
| 79 | |
| 80 | if (port >= ARRAY_SIZE(gpio_ports)) |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 81 | return -1; |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 82 | |
| 83 | gpio &= 0x1f; |
| 84 | |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 85 | regs = (struct gpio_regs *)gpio_ports[port]; |
| 86 | |
| 87 | l = readl(®s->gpio_dir); |
| 88 | |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 89 | switch (direction) { |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 90 | case MXC_GPIO_DIRECTION_OUT: |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 91 | l |= 1 << gpio; |
| 92 | break; |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 93 | case MXC_GPIO_DIRECTION_IN: |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 94 | l &= ~(1 << gpio); |
| 95 | } |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 96 | writel(l, ®s->gpio_dir); |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 97 | |
| 98 | return 0; |
| 99 | } |
| 100 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 101 | int gpio_set_value(unsigned gpio, int value) |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 102 | { |
Vikram Narayanan | fbdf6bc | 2012-04-10 04:26:20 +0000 | [diff] [blame] | 103 | unsigned int port = GPIO_TO_PORT(gpio); |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 104 | struct gpio_regs *regs; |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 105 | u32 l; |
| 106 | |
| 107 | if (port >= ARRAY_SIZE(gpio_ports)) |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 108 | return -1; |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 109 | |
| 110 | gpio &= 0x1f; |
| 111 | |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 112 | regs = (struct gpio_regs *)gpio_ports[port]; |
| 113 | |
| 114 | l = readl(®s->gpio_dr); |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 115 | if (value) |
| 116 | l |= 1 << gpio; |
| 117 | else |
| 118 | l &= ~(1 << gpio); |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 119 | writel(l, ®s->gpio_dr); |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 120 | |
| 121 | return 0; |
Guennadi Liakhovetski | 7c6a856 | 2009-02-07 01:18:07 +0100 | [diff] [blame] | 122 | } |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 123 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 124 | int gpio_get_value(unsigned gpio) |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 125 | { |
Vikram Narayanan | fbdf6bc | 2012-04-10 04:26:20 +0000 | [diff] [blame] | 126 | unsigned int port = GPIO_TO_PORT(gpio); |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 127 | struct gpio_regs *regs; |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 128 | u32 val; |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 129 | |
| 130 | if (port >= ARRAY_SIZE(gpio_ports)) |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 131 | return -1; |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 132 | |
| 133 | gpio &= 0x1f; |
| 134 | |
Stefano Babic | d77fe99 | 2010-07-06 17:05:06 +0200 | [diff] [blame] | 135 | regs = (struct gpio_regs *)gpio_ports[port]; |
| 136 | |
Benoît Thébaudeau | daaf7a9 | 2012-08-20 10:55:41 +0000 | [diff] [blame] | 137 | val = (readl(®s->gpio_psr) >> gpio) & 0x01; |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 138 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 139 | return val; |
Stefano Babic | a44d2a5 | 2010-04-13 12:07:00 +0200 | [diff] [blame] | 140 | } |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 141 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 142 | int gpio_request(unsigned gpio, const char *label) |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 143 | { |
Vikram Narayanan | fbdf6bc | 2012-04-10 04:26:20 +0000 | [diff] [blame] | 144 | unsigned int port = GPIO_TO_PORT(gpio); |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 145 | if (port >= ARRAY_SIZE(gpio_ports)) |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 146 | return -1; |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 147 | return 0; |
| 148 | } |
| 149 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 150 | int gpio_free(unsigned gpio) |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 151 | { |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 152 | return 0; |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 153 | } |
| 154 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 155 | int gpio_direction_input(unsigned gpio) |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 156 | { |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 157 | return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN); |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 158 | } |
| 159 | |
Joe Hershberger | f8928f1 | 2011-11-11 15:55:36 -0600 | [diff] [blame] | 160 | int gpio_direction_output(unsigned gpio, int value) |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 161 | { |
Dirk Behme | 1e0803f | 2013-07-15 15:58:27 +0200 | [diff] [blame] | 162 | int ret = gpio_set_value(gpio, value); |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 163 | |
| 164 | if (ret < 0) |
| 165 | return ret; |
| 166 | |
Dirk Behme | 1e0803f | 2013-07-15 15:58:27 +0200 | [diff] [blame] | 167 | return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT); |
Stefano Babic | 7faee91 | 2011-08-21 10:45:44 +0200 | [diff] [blame] | 168 | } |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 169 | #endif |
| 170 | |
Simon Glass | fa4689a | 2019-12-06 21:41:35 -0700 | [diff] [blame] | 171 | #if CONFIG_IS_ENABLED(DM_GPIO) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 172 | #include <fdtdec.h> |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 173 | static int mxc_gpio_is_output(struct gpio_regs *regs, int offset) |
| 174 | { |
| 175 | u32 val; |
| 176 | |
| 177 | val = readl(®s->gpio_dir); |
| 178 | |
| 179 | return val & (1 << offset) ? 1 : 0; |
| 180 | } |
| 181 | |
| 182 | static void mxc_gpio_bank_direction(struct gpio_regs *regs, int offset, |
| 183 | enum mxc_gpio_direction direction) |
| 184 | { |
| 185 | u32 l; |
| 186 | |
| 187 | l = readl(®s->gpio_dir); |
| 188 | |
| 189 | switch (direction) { |
| 190 | case MXC_GPIO_DIRECTION_OUT: |
| 191 | l |= 1 << offset; |
| 192 | break; |
| 193 | case MXC_GPIO_DIRECTION_IN: |
| 194 | l &= ~(1 << offset); |
| 195 | } |
| 196 | writel(l, ®s->gpio_dir); |
| 197 | } |
| 198 | |
| 199 | static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset, |
| 200 | int value) |
| 201 | { |
| 202 | u32 l; |
| 203 | |
| 204 | l = readl(®s->gpio_dr); |
| 205 | if (value) |
| 206 | l |= 1 << offset; |
| 207 | else |
| 208 | l &= ~(1 << offset); |
| 209 | writel(l, ®s->gpio_dr); |
| 210 | } |
| 211 | |
| 212 | static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset) |
| 213 | { |
| 214 | return (readl(®s->gpio_psr) >> offset) & 0x01; |
| 215 | } |
| 216 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 217 | /* set GPIO pin 'gpio' as an input */ |
| 218 | static int mxc_gpio_direction_input(struct udevice *dev, unsigned offset) |
| 219 | { |
| 220 | struct mxc_bank_info *bank = dev_get_priv(dev); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 221 | |
| 222 | /* Configure GPIO direction as input. */ |
| 223 | mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_IN); |
| 224 | |
| 225 | return 0; |
| 226 | } |
| 227 | |
| 228 | /* set GPIO pin 'gpio' as an output, with polarity 'value' */ |
| 229 | static int mxc_gpio_direction_output(struct udevice *dev, unsigned offset, |
| 230 | int value) |
| 231 | { |
| 232 | struct mxc_bank_info *bank = dev_get_priv(dev); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 233 | |
| 234 | /* Configure GPIO output value. */ |
| 235 | mxc_gpio_bank_set_value(bank->regs, offset, value); |
| 236 | |
| 237 | /* Configure GPIO direction as output. */ |
| 238 | mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_OUT); |
| 239 | |
| 240 | return 0; |
| 241 | } |
| 242 | |
| 243 | /* read GPIO IN value of pin 'gpio' */ |
| 244 | static int mxc_gpio_get_value(struct udevice *dev, unsigned offset) |
| 245 | { |
| 246 | struct mxc_bank_info *bank = dev_get_priv(dev); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 247 | |
| 248 | return mxc_gpio_bank_get_value(bank->regs, offset); |
| 249 | } |
| 250 | |
| 251 | /* write GPIO OUT value to pin 'gpio' */ |
| 252 | static int mxc_gpio_set_value(struct udevice *dev, unsigned offset, |
| 253 | int value) |
| 254 | { |
| 255 | struct mxc_bank_info *bank = dev_get_priv(dev); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 256 | |
| 257 | mxc_gpio_bank_set_value(bank->regs, offset, value); |
| 258 | |
| 259 | return 0; |
| 260 | } |
| 261 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 262 | static int mxc_gpio_get_function(struct udevice *dev, unsigned offset) |
| 263 | { |
| 264 | struct mxc_bank_info *bank = dev_get_priv(dev); |
| 265 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 266 | /* GPIOF_FUNC is not implemented yet */ |
| 267 | if (mxc_gpio_is_output(bank->regs, offset)) |
| 268 | return GPIOF_OUTPUT; |
| 269 | else |
| 270 | return GPIOF_INPUT; |
| 271 | } |
| 272 | |
| 273 | static const struct dm_gpio_ops gpio_mxc_ops = { |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 274 | .direction_input = mxc_gpio_direction_input, |
| 275 | .direction_output = mxc_gpio_direction_output, |
| 276 | .get_value = mxc_gpio_get_value, |
| 277 | .set_value = mxc_gpio_set_value, |
| 278 | .get_function = mxc_gpio_get_function, |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 279 | }; |
| 280 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 281 | static int mxc_gpio_probe(struct udevice *dev) |
| 282 | { |
| 283 | struct mxc_bank_info *bank = dev_get_priv(dev); |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 284 | struct mxc_gpio_plat *plat = dev_get_plat(dev); |
Simon Glass | de0977b | 2015-03-05 12:25:20 -0700 | [diff] [blame] | 285 | struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 286 | int banknum; |
| 287 | char name[18], *str; |
| 288 | |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 289 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
| 290 | struct dtd_gpio_mxc *dtplat = &plat->dtplat; |
| 291 | |
| 292 | plat->regs = map_sysmem(dtplat->reg[0], dtplat->reg[1]); |
| 293 | #endif |
| 294 | |
Peng Fan | 86be426 | 2015-02-10 14:46:33 +0800 | [diff] [blame] | 295 | banknum = plat->bank_index; |
Ye Li | 81a4421 | 2020-06-09 20:28:02 -0700 | [diff] [blame] | 296 | if (IS_ENABLED(CONFIG_ARCH_IMX8)) |
| 297 | sprintf(name, "GPIO%d_", banknum); |
| 298 | else |
| 299 | sprintf(name, "GPIO%d_", banknum + 1); |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 300 | str = strdup(name); |
| 301 | if (!str) |
| 302 | return -ENOMEM; |
| 303 | uc_priv->bank_name = str; |
| 304 | uc_priv->gpio_count = GPIO_PER_BANK; |
| 305 | bank->regs = plat->regs; |
| 306 | |
| 307 | return 0; |
| 308 | } |
| 309 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 310 | static int mxc_gpio_of_to_plat(struct udevice *dev) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 311 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 312 | struct mxc_gpio_plat *plat = dev_get_plat(dev); |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 313 | if (!CONFIG_IS_ENABLED(OF_PLATDATA)) { |
| 314 | fdt_addr_t addr; |
Tom Rini | 322ebe9 | 2020-08-04 11:11:02 -0400 | [diff] [blame] | 315 | addr = dev_read_addr(dev); |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 316 | if (addr == FDT_ADDR_T_NONE) |
| 317 | return -EINVAL; |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 318 | |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 319 | plat->regs = (struct gpio_regs *)addr; |
| 320 | } |
Simon Glass | b4db372 | 2020-12-16 21:20:24 -0700 | [diff] [blame] | 321 | plat->bank_index = dev_seq(dev); |
Ye Li | 755f3ee | 2020-06-09 20:29:51 -0700 | [diff] [blame] | 322 | |
| 323 | return 0; |
| 324 | } |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 325 | |
Ye Li | 755f3ee | 2020-06-09 20:29:51 -0700 | [diff] [blame] | 326 | static int mxc_gpio_bind(struct udevice *dev) |
| 327 | { |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | static const struct udevice_id mxc_gpio_ids[] = { |
| 332 | { .compatible = "fsl,imx35-gpio" }, |
| 333 | { } |
| 334 | }; |
| 335 | |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 336 | U_BOOT_DRIVER(gpio_mxc) = { |
| 337 | .name = "gpio_mxc", |
| 338 | .id = UCLASS_GPIO, |
| 339 | .ops = &gpio_mxc_ops, |
| 340 | .probe = mxc_gpio_probe, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 341 | .of_to_plat = mxc_gpio_of_to_plat, |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 342 | .plat_auto = sizeof(struct mxc_gpio_plat), |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 343 | .priv_auto = sizeof(struct mxc_bank_info), |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 344 | .of_match = mxc_gpio_ids, |
| 345 | .bind = mxc_gpio_bind, |
| 346 | }; |
| 347 | |
Walter Lozano | e58c4f5 | 2020-07-29 12:31:18 -0300 | [diff] [blame] | 348 | U_BOOT_DRIVER_ALIAS(gpio_mxc, fsl_imx6q_gpio) |
| 349 | |
Masahiro Yamada | 366b24f | 2015-08-12 07:31:55 +0900 | [diff] [blame] | 350 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 351 | static const struct mxc_gpio_plat mxc_plat[] = { |
| 352 | { 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, |
| 353 | { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, |
| 354 | { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, |
| 355 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 356 | defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 357 | defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 358 | { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, |
| 359 | #endif |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 360 | #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 361 | defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 362 | { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 363 | #ifndef CONFIG_IMX8M |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 364 | { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, |
| 365 | #endif |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 366 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 367 | #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_ARCH_IMX8) |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 368 | { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, |
| 369 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 370 | #if defined(CONFIG_ARCH_IMX8) |
| 371 | { 7, (struct gpio_regs *)GPIO8_BASE_ADDR }, |
| 372 | #endif |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 373 | }; |
| 374 | |
| 375 | U_BOOT_DEVICES(mxc_gpios) = { |
| 376 | { "gpio_mxc", &mxc_plat[0] }, |
| 377 | { "gpio_mxc", &mxc_plat[1] }, |
| 378 | { "gpio_mxc", &mxc_plat[2] }, |
| 379 | #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 380 | defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 381 | defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 382 | { "gpio_mxc", &mxc_plat[3] }, |
| 383 | #endif |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 384 | #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 385 | defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 386 | { "gpio_mxc", &mxc_plat[4] }, |
Peng Fan | 39945c1 | 2018-11-20 10:19:25 +0000 | [diff] [blame] | 387 | #ifndef CONFIG_IMX8M |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 388 | { "gpio_mxc", &mxc_plat[5] }, |
| 389 | #endif |
Peng Fan | fa94fb4 | 2018-01-10 13:20:42 +0800 | [diff] [blame] | 390 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 391 | #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_ARCH_IMX8) |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 392 | { "gpio_mxc", &mxc_plat[6] }, |
| 393 | #endif |
Peng Fan | b2242e1 | 2018-10-18 14:28:27 +0200 | [diff] [blame] | 394 | #if defined(CONFIG_ARCH_IMX8) |
| 395 | { "gpio_mxc", &mxc_plat[7] }, |
| 396 | #endif |
Simon Glass | 2772b4d | 2014-10-01 19:57:26 -0600 | [diff] [blame] | 397 | }; |
| 398 | #endif |
Peng Fan | 0ed2cb1 | 2015-02-10 14:46:34 +0800 | [diff] [blame] | 399 | #endif |