blob: 101f86175135f7af1876ebf0d1f8e21edf37dab0 [file] [log] [blame]
Ramon Friedafdb3422019-04-27 11:15:24 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Ramon Fried
4 */
5
6#include <common.h>
7#include <dm.h>
8#include <asm/io.h>
9#include <asm/test.h>
10#include <dm/test.h>
11#include <test/ut.h>
12#include <hexdump.h>
13#include <pci_ep.h>
14
15/* Test that sandbox PCI EP works correctly */
16static int dm_test_pci_ep_base(struct unit_test_state *uts)
17{
18 struct udevice *bus;
19 struct pci_bar tmp_bar;
20 struct pci_ep_header tmp_header;
21 int i;
22
23 struct pci_ep_header ep_header = {
24 .vendorid = 0x1234,
25 .deviceid = 0x2020,
26 .revid = 1,
27 .interrupt_pin = PCI_INTERRUPT_INTA,
28 };
29
30 struct pci_bar bar = {
31 .phys_addr = 0x80000000,
32 .size = 0x100000,
33 .barno = BAR_0,
34 .flags = PCI_BASE_ADDRESS_MEM_TYPE_64 |
35 PCI_BASE_ADDRESS_MEM_PREFETCH,
36 };
37
38 ut_assertok(uclass_get_device(UCLASS_PCI_EP, 0, &bus));
39 ut_assertnonnull(bus);
40
41 ut_assertok(pci_ep_write_header(bus, 0, &ep_header));
42 ut_assertok(pci_ep_read_header(bus, 0, &tmp_header));
43 ut_asserteq_mem(&tmp_header, &ep_header, sizeof(ep_header));
44
45 ut_assertok(pci_ep_set_msi(bus, 0, 4));
46 ut_asserteq(pci_ep_get_msi(bus, 0), 4);
47
48 ut_assertok(pci_ep_set_msix(bus, 0, 360));
49 ut_asserteq(pci_ep_get_msix(bus, 0), 360);
50
51 ut_assertok(pci_ep_set_bar(bus, 0, &bar));
52
53 ut_assertok(pci_ep_read_bar(bus, 0, &tmp_bar, BAR_0));
54 ut_asserteq_mem(&tmp_bar, &bar, sizeof(bar));
55
56 for (i = 0; i < 10; i++)
57 ut_assertok(pci_ep_raise_irq(bus, 0, 1, PCI_EP_IRQ_LEGACY));
58
59 ut_asserteq(sandbox_get_pci_ep_irq_count(bus), 10);
60 return 0;
61}
62
63DM_TEST(dm_test_pci_ep_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
64