Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 2 | /* |
| 3 | * SEC Descriptor Construction Library |
| 4 | * Basic job descriptor construction |
| 5 | * |
| 6 | * Copyright 2014 Freescale Semiconductor, Inc. |
Aymen Sghaier | 4da2569 | 2021-03-25 17:30:25 +0800 | [diff] [blame] | 7 | * Copyright 2018 NXP |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 8 | * |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 12 | #include <cpu_func.h> |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 13 | #include <fsl_sec.h> |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 14 | #include "desc_constr.h" |
| 15 | #include "jobdesc.h" |
Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 16 | #include "rsa_caam.h" |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 17 | #include <asm/cache.h> |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 18 | |
Aymen Sghaier | 4da2569 | 2021-03-25 17:30:25 +0800 | [diff] [blame] | 19 | #if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \ |
| 20 | defined(CONFIG_IMX8M) |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 21 | /*! |
| 22 | * Secure memory run command |
| 23 | * |
| 24 | * @param sec_mem_cmd Secure memory command register |
| 25 | * @return cmd_status Secure memory command status register |
| 26 | */ |
| 27 | uint32_t secmem_set_cmd(uint32_t sec_mem_cmd) |
| 28 | { |
| 29 | uint32_t temp_reg; |
| 30 | |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 31 | ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR; |
| 32 | uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid)); |
| 33 | uint32_t jr_id = 0; |
| 34 | |
| 35 | sec_out32(CAAM_SMCJR(sm_vid, jr_id), sec_mem_cmd); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 36 | |
| 37 | do { |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 38 | temp_reg = sec_in32(CAAM_SMCSJR(sm_vid, jr_id)); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 39 | } while (temp_reg & CMD_COMPLETE); |
| 40 | |
| 41 | return temp_reg; |
| 42 | } |
| 43 | |
| 44 | /*! |
| 45 | * CAAM page allocation: |
| 46 | * Allocates a partition from secure memory, with the id |
Robert P. J. Day | c5b1e5d | 2016-09-07 14:27:59 -0400 | [diff] [blame] | 47 | * equal to partition_num. This will de-allocate the page |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 48 | * if it is already allocated. The partition will have |
| 49 | * full access permissions. The permissions are set before, |
| 50 | * running a job descriptor. A memory page of secure RAM |
| 51 | * is allocated for the partition. |
| 52 | * |
| 53 | * @param page Number of the page to allocate. |
| 54 | * @param partition Number of the partition to allocate. |
| 55 | * @return 0 on success, ERROR_IN_PAGE_ALLOC otherwise |
| 56 | */ |
| 57 | int caam_page_alloc(uint8_t page_num, uint8_t partition_num) |
| 58 | { |
| 59 | uint32_t temp_reg; |
| 60 | |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 61 | ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR; |
| 62 | uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid)); |
| 63 | uint32_t jr_id = 0; |
| 64 | |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 65 | /* |
| 66 | * De-Allocate partition_num if already allocated to ARM core |
| 67 | */ |
| 68 | if (sec_in32(CAAM_SMPO_0) & PARTITION_OWNER(partition_num)) { |
| 69 | temp_reg = secmem_set_cmd(PARTITION(partition_num) | |
| 70 | CMD_PART_DEALLOC); |
| 71 | if (temp_reg & SMCSJR_AERR) { |
| 72 | printf("Error: De-allocation status 0x%X\n", temp_reg); |
| 73 | return ERROR_IN_PAGE_ALLOC; |
| 74 | } |
| 75 | } |
| 76 | |
| 77 | /* set the access rights to allow full access */ |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 78 | sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, partition_num), 0xF); |
| 79 | sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, partition_num), 0xF); |
| 80 | sec_out32(CAAM_SMAPJR(sm_vid, jr_id, partition_num), 0xFF); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 81 | |
| 82 | /* Now need to allocate partition_num of secure RAM. */ |
| 83 | /* De-Allocate page_num by starting with a page inquiry command */ |
| 84 | temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY); |
| 85 | |
| 86 | /* if the page is owned, de-allocate it */ |
| 87 | if ((temp_reg & SMCSJR_PO) == PAGE_OWNED) { |
| 88 | temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_PAGE_DEALLOC); |
| 89 | if (temp_reg & SMCSJR_AERR) { |
| 90 | printf("Error: Allocation status 0x%X\n", temp_reg); |
| 91 | return ERROR_IN_PAGE_ALLOC; |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | /* Allocate page_num to partition_num */ |
| 96 | temp_reg = secmem_set_cmd(PAGE(page_num) | PARTITION(partition_num) |
| 97 | | CMD_PAGE_ALLOC); |
| 98 | if (temp_reg & SMCSJR_AERR) { |
| 99 | printf("Error: Allocation status 0x%X\n", temp_reg); |
| 100 | return ERROR_IN_PAGE_ALLOC; |
| 101 | } |
| 102 | /* page inquiry command to ensure that the page was allocated */ |
| 103 | temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY); |
| 104 | |
| 105 | /* if the page is not owned => problem */ |
| 106 | if ((temp_reg & SMCSJR_PO) != PAGE_OWNED) { |
Heinrich Schuchardt | 87154f7 | 2020-06-27 10:08:49 +0200 | [diff] [blame] | 107 | printf("Allocation of page %u in partition %u failed 0x%X\n", |
| 108 | page_num, partition_num, temp_reg); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 109 | |
| 110 | return ERROR_IN_PAGE_ALLOC; |
| 111 | } |
| 112 | |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | int inline_cnstr_jobdesc_blob_dek(uint32_t *desc, const uint8_t *plain_txt, |
| 117 | uint8_t *dek_blob, uint32_t in_sz) |
| 118 | { |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 119 | ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR; |
| 120 | uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid)); |
| 121 | uint32_t jr_id = 0; |
| 122 | |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 123 | uint32_t ret = 0; |
| 124 | u32 aad_w1, aad_w2; |
| 125 | /* output blob will have 32 bytes key blob in beginning and |
| 126 | * 16 byte HMAC identifier at end of data blob */ |
| 127 | uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE; |
| 128 | /* Setting HDR for blob */ |
| 129 | uint8_t wrapped_key_hdr[8] = {HDR_TAG, 0x00, WRP_HDR_SIZE + out_sz, |
| 130 | HDR_PAR, HAB_MOD, HAB_ALG, in_sz, HAB_FLG}; |
| 131 | |
| 132 | /* initialize the blob array */ |
| 133 | memset(dek_blob, 0, out_sz + 8); |
| 134 | /* Copy the header into the DEK blob buffer */ |
| 135 | memcpy(dek_blob, wrapped_key_hdr, sizeof(wrapped_key_hdr)); |
| 136 | |
| 137 | /* allocating secure memory */ |
| 138 | ret = caam_page_alloc(PAGE_1, PARTITION_1); |
| 139 | if (ret) |
| 140 | return ret; |
| 141 | |
| 142 | /* Write DEK to secure memory */ |
| 143 | memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz); |
| 144 | |
| 145 | unsigned long start = (unsigned long)SEC_MEM_PAGE1 & |
| 146 | ~(ARCH_DMA_MINALIGN - 1); |
| 147 | unsigned long end = ALIGN(start + 0x1000, ARCH_DMA_MINALIGN); |
| 148 | flush_dcache_range(start, end); |
| 149 | |
| 150 | /* Now configure the access rights of the partition */ |
Ulises Cardenas | 2f736a9 | 2016-02-02 04:39:39 -0600 | [diff] [blame] | 151 | sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, PARTITION_1), KS_G1); |
| 152 | sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, PARTITION_1), 0); |
| 153 | sec_out32(CAAM_SMAPJR(sm_vid, jr_id, PARTITION_1), PERM); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 154 | |
| 155 | /* construct aad for AES */ |
| 156 | aad_w1 = (in_sz << OP_ALG_ALGSEL_SHIFT) | KEY_AES_SRC | LD_CCM_MODE; |
| 157 | aad_w2 = 0x0; |
| 158 | |
| 159 | init_job_desc(desc, 0); |
| 160 | |
| 161 | append_cmd(desc, CMD_LOAD | CLASS_2 | KEY_IMM | KEY_ENC | |
| 162 | (0x0c << LDST_OFFSET_SHIFT) | 0x08); |
| 163 | |
| 164 | append_u32(desc, aad_w1); |
| 165 | |
| 166 | append_u32(desc, aad_w2); |
| 167 | |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 168 | append_cmd_ptr(desc, (caam_dma_addr_t)SEC_MEM_PAGE1, in_sz, CMD_SEQ_IN_PTR); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 169 | |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 170 | append_cmd_ptr(desc, (caam_dma_addr_t)(ulong)(dek_blob + 8), out_sz, CMD_SEQ_OUT_PTR); |
Raul Cardenas | b5a36d8 | 2015-02-27 11:22:06 -0600 | [diff] [blame] | 171 | |
| 172 | append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB | |
| 173 | OP_PCLID_SECMEM); |
| 174 | |
| 175 | return ret; |
| 176 | } |
| 177 | #endif |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 178 | |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 179 | void inline_cnstr_jobdesc_hash(uint32_t *desc, |
| 180 | const uint8_t *msg, uint32_t msgsz, uint8_t *digest, |
| 181 | u32 alg_type, uint32_t alg_size, int sg_tbl) |
| 182 | { |
| 183 | /* SHA 256 , output is of length 32 words */ |
| 184 | uint32_t storelen = alg_size; |
| 185 | u32 options; |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 186 | caam_dma_addr_t dma_addr_in, dma_addr_out; |
Ruchika Gupta | ac1b269 | 2014-10-15 11:35:30 +0530 | [diff] [blame] | 187 | |
| 188 | dma_addr_in = virt_to_phys((void *)msg); |
| 189 | dma_addr_out = virt_to_phys((void *)digest); |
| 190 | |
| 191 | init_job_desc(desc, 0); |
| 192 | append_operation(desc, OP_TYPE_CLASS2_ALG | |
| 193 | OP_ALG_AAI_HASH | OP_ALG_AS_INITFINAL | |
| 194 | OP_ALG_ENCRYPT | OP_ALG_ICV_OFF | alg_type); |
| 195 | |
| 196 | options = LDST_CLASS_2_CCB | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2; |
| 197 | if (sg_tbl) |
| 198 | options |= FIFOLDST_SGF; |
| 199 | if (msgsz > 0xffff) { |
| 200 | options |= FIFOLDST_EXT; |
| 201 | append_fifo_load(desc, dma_addr_in, 0, options); |
| 202 | append_cmd(desc, msgsz); |
| 203 | } else { |
| 204 | append_fifo_load(desc, dma_addr_in, msgsz, options); |
| 205 | } |
| 206 | |
| 207 | append_store(desc, dma_addr_out, storelen, |
| 208 | LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT); |
| 209 | } |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 210 | #ifndef CONFIG_SPL_BUILD |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 211 | void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, |
| 212 | uint8_t *plain_txt, uint8_t *enc_blob, |
| 213 | uint32_t in_sz) |
| 214 | { |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 215 | caam_dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out; |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 216 | uint32_t key_sz = KEY_IDNFR_SZ_BYTES; |
| 217 | /* output blob will have 32 bytes key blob in beginning and |
| 218 | * 16 byte HMAC identifier at end of data blob */ |
| 219 | uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE; |
| 220 | |
| 221 | dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr); |
| 222 | dma_addr_in = virt_to_phys((void *)plain_txt); |
| 223 | dma_addr_out = virt_to_phys((void *)enc_blob); |
| 224 | |
| 225 | init_job_desc(desc, 0); |
| 226 | |
| 227 | append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2); |
| 228 | |
| 229 | append_seq_in_ptr(desc, dma_addr_in, in_sz, 0); |
| 230 | |
| 231 | append_seq_out_ptr(desc, dma_addr_out, out_sz, 0); |
| 232 | |
| 233 | append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB); |
| 234 | } |
| 235 | |
| 236 | void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, |
| 237 | uint8_t *enc_blob, uint8_t *plain_txt, |
| 238 | uint32_t out_sz) |
| 239 | { |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 240 | caam_dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out; |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 241 | uint32_t key_sz = KEY_IDNFR_SZ_BYTES; |
| 242 | uint32_t in_sz = out_sz + KEY_BLOB_SIZE + MAC_SIZE; |
| 243 | |
| 244 | dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr); |
| 245 | dma_addr_in = virt_to_phys((void *)enc_blob); |
| 246 | dma_addr_out = virt_to_phys((void *)plain_txt); |
| 247 | |
| 248 | init_job_desc(desc, 0); |
| 249 | |
| 250 | append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2); |
| 251 | |
| 252 | append_seq_in_ptr(desc, dma_addr_in, in_sz, 0); |
| 253 | |
| 254 | append_seq_out_ptr(desc, dma_addr_out, out_sz, 0); |
| 255 | |
| 256 | append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB); |
| 257 | } |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 258 | #endif |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 259 | /* |
| 260 | * Descriptor to instantiate RNG State Handle 0 in normal mode and |
| 261 | * load the JDKEK, TDKEK and TDSK registers |
| 262 | */ |
Michael Walle | 602cc8d | 2020-06-27 22:58:51 +0200 | [diff] [blame] | 263 | void inline_cnstr_jobdesc_rng_instantiation(u32 *desc, int handle, int do_sk) |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 264 | { |
| 265 | u32 *jump_cmd; |
| 266 | |
| 267 | init_job_desc(desc, 0); |
| 268 | |
| 269 | /* INIT RNG in non-test mode */ |
| 270 | append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | |
Michael Walle | e692a00 | 2020-06-27 22:58:52 +0200 | [diff] [blame] | 271 | (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT | |
| 272 | OP_ALG_PR_ON); |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 273 | |
Lukas Auer | aed8eac | 2018-01-25 14:11:17 +0100 | [diff] [blame] | 274 | /* For SH0, Secure Keys must be generated as well */ |
Michael Walle | 602cc8d | 2020-06-27 22:58:51 +0200 | [diff] [blame] | 275 | if (!handle && do_sk) { |
Lukas Auer | aed8eac | 2018-01-25 14:11:17 +0100 | [diff] [blame] | 276 | /* wait for done */ |
| 277 | jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1); |
| 278 | set_jump_tgt_here(desc, jump_cmd); |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 279 | |
Lukas Auer | aed8eac | 2018-01-25 14:11:17 +0100 | [diff] [blame] | 280 | /* |
| 281 | * load 1 to clear written reg: |
| 282 | * resets the done interrupt and returns the RNG to idle. |
| 283 | */ |
| 284 | append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW); |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 285 | |
Lukas Auer | aed8eac | 2018-01-25 14:11:17 +0100 | [diff] [blame] | 286 | /* generate secure keys (non-test) */ |
| 287 | append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | |
| 288 | OP_ALG_RNG4_SK); |
| 289 | } |
Ruchika Gupta | 4345a57 | 2014-10-07 15:46:20 +0530 | [diff] [blame] | 290 | } |
Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 291 | |
Michael Walle | e692a00 | 2020-06-27 22:58:52 +0200 | [diff] [blame] | 292 | /* Descriptor for deinstantiation of the RNG block. */ |
| 293 | void inline_cnstr_jobdesc_rng_deinstantiation(u32 *desc, int handle) |
| 294 | { |
| 295 | init_job_desc(desc, 0); |
| 296 | |
| 297 | append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | |
| 298 | (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INITFINAL); |
| 299 | } |
| 300 | |
Michael Walle | b258eb2 | 2020-06-27 22:58:53 +0200 | [diff] [blame] | 301 | void inline_cnstr_jobdesc_rng(u32 *desc, void *data_out, u32 size) |
| 302 | { |
Horia Geantă | 53bc88b | 2021-08-10 17:12:19 +0300 | [diff] [blame^] | 303 | caam_dma_addr_t dma_data_out = virt_to_phys(data_out); |
Michael Walle | b258eb2 | 2020-06-27 22:58:53 +0200 | [diff] [blame] | 304 | |
| 305 | init_job_desc(desc, 0); |
| 306 | append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG | |
| 307 | OP_ALG_PR_ON); |
| 308 | append_fifo_store(desc, dma_data_out, size, FIFOST_TYPE_RNGSTORE); |
| 309 | } |
| 310 | |
Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 311 | /* Change key size to bytes form bits in calling function*/ |
| 312 | void inline_cnstr_jobdesc_pkha_rsaexp(uint32_t *desc, |
| 313 | struct pk_in_params *pkin, uint8_t *out, |
| 314 | uint32_t out_siz) |
| 315 | { |
Ye Li | 3c3e9a1 | 2021-03-25 17:30:36 +0800 | [diff] [blame] | 316 | caam_dma_addr_t dma_addr_e, dma_addr_a, dma_addr_n, dma_addr_out; |
Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 317 | |
| 318 | dma_addr_e = virt_to_phys((void *)pkin->e); |
| 319 | dma_addr_a = virt_to_phys((void *)pkin->a); |
| 320 | dma_addr_n = virt_to_phys((void *)pkin->n); |
| 321 | dma_addr_out = virt_to_phys((void *)out); |
| 322 | |
| 323 | init_job_desc(desc, 0); |
| 324 | append_key(desc, dma_addr_e, pkin->e_siz, KEY_DEST_PKHA_E | CLASS_1); |
| 325 | |
| 326 | append_fifo_load(desc, dma_addr_a, |
| 327 | pkin->a_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_A); |
| 328 | |
| 329 | append_fifo_load(desc, dma_addr_n, |
| 330 | pkin->n_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_N); |
| 331 | |
| 332 | append_operation(desc, OP_TYPE_PK | OP_ALG_PK | OP_ALG_PKMODE_MOD_EXPO); |
| 333 | |
| 334 | append_fifo_store(desc, dma_addr_out, out_siz, |
| 335 | LDST_CLASS_1_CCB | FIFOST_TYPE_PKHA_B); |
| 336 | } |