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Vitor Soares987c7362025-04-07 14:04:36 +01001.. SPDX-License-Identifier: GPL-2.0-or-later
2
3Toradex SMARC iMX8M Plus Module
4===============================
5
6- SoM: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-8m-plus
7- Carrier board: https://www.toradex.com/products/carrier-board/smarc-development-board-kit
8
9Quick Start
10-----------
11
12- Build the ARM trusted firmware binary
13- Get the DDR firmware
14- Build U-Boot
15- Flash to eMMC
16- Boot
17
18Get and Build the ARM Trusted Firmware (Trusted Firmware A)
19-----------------------------------------------------------
20
21.. code-block:: bash
22
23 $ echo "Downloading and building TF-A..."
24 $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
25 $ cd trusted-firmware-a
26
27Then build ATF (TF-A):
28
29.. code-block:: bash
30
31 $ export CROSS_COMPILE=aarch64-linux-gnu-
32 $ make PLAT=imx8mp IMX_BOOT_UART_BASE=0x30a60000 bl31
33 $ cp build/imx8mp/release/bl31.bin ../
34
35Get the DDR Firmware
36--------------------
37
38.. code-block:: bash
39
40 $ cd ..
41 $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.1.bin
42 $ chmod +x firmware-imx-8.10.1.bin
43 $ ./firmware-imx-8.10.1.bin
44 $ cp firmware-imx-8.10.1/firmware/ddr/synopsys/lpddr4*_202006.bin ./
45
46Build U-Boot
47------------
48
49.. code-block:: bash
50
51 $ export CROSS_COMPILE=aarch64-linux-gnu-
52 $ make toradex-smarc-imx8mp_defconfig
53 $ make
54
55Flash to eMMC
56-------------
57
58.. code-block:: bash
59
60 > tftpboot ${loadaddr} flash.bin
61 > setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
62 > mmc dev 0 1 && mmc write ${loadaddr} 0x0 ${blkcnt}
63
64As a convenience, instead of the last two commands, one may also use the update
65U-Boot wrapper:
66
67.. code-block:: bash
68
69 > run update_uboot
70
71Boot
72----
73
74ATF, U-Boot proper and u-boot.dtb images are packed into a FIT image,
75which is loaded and parsed by SPL.
76
77Boot sequence is:
78
79* SPL ---> ATF (TF-A) ---> U-Boot proper
80
81Output::
82
83 U-Boot SPL 2025.04-rc5-00023-g34c31be81211 (Apr 04 2025 - 15:36:23 +0100)
84 Training FAILED
85 DDR configured as single rank
86 SEC0: RNG instantiated
87 Normal Boot
88 Trying to boot from BOOTROM
89 Boot Stage: Primary boot
90 Find img info 0x4802f200, size 1100
91 Need continue download 1024
92 NOTICE: Do not release JR0 to NS as it can be used by HAB
93 NOTICE: BL31: v2.11.0(release):v2.11.0-723-gbd298f5c30ac
94 NOTICE: BL31: Built : 14:18:43, Apr 4 2025
95
96
97 U-Boot 2025.04-rc5-00023-g34c31be81211 (Apr 04 2025 - 15:36:23 +0100)
98
99 CPU: Freescale i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
100 CPU: Industrial temperature grade (-40C to 105C) at 72C
101 Reset cause: POR
102 DRAM: 4 GiB
103 Core: 312 devices, 32 uclasses, devicetree: separate
104 WDT: Started watchdog@30280000 with servicing every 1000ms (60s timeout)
105 MMC: FSL_SDHC: 1, FSL_SDHC: 0
106 Loading Environment from MMC... Reading from MMC(0)... OK
107 In: serial@30a60000
108 Out: serial@30a60000
109 Err: serial@30a60000
110 Model: Toradex 0097 SMARC iMX8M Plus Quad 4GB WB IT V1.0A
111 Serial#: 15603364
112 SEC0: RNG instantiated
113 Net: Get shared mii bus on ethernet@30be0000
114 eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME]
115 Hit any key to stop autoboot: 0
116 SMARC iMX8MP #