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Heiko Schochercfcad352013-12-02 07:47:22 +01001/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
23
24#define MACH_TYPE_TAURUS 2067
25#define MACH_TYPE_AXM 2068
26
Heiko Schocher89cd46f2014-10-01 07:26:06 +020027#define CONFIG_SYS_GENERIC_BOARD
28
Heiko Schochercfcad352013-12-02 07:47:22 +010029/*
30 * Warning: changing CONFIG_SYS_TEXT_BASE requires
31 * adapting the initial boot program.
32 * Since the linker has to swallow that define, we must use a pure
33 * hex number here!
34 */
35
36
Heiko Schocher5453c6c2014-10-31 08:31:05 +010037#define CONFIG_SYS_TEXT_BASE 0x21000000
Heiko Schochercfcad352013-12-02 07:47:22 +010038
39/* ARM asynchronous clock */
40#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
41#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schochercfcad352013-12-02 07:47:22 +010042
43/* Misc CPU related */
44#define CONFIG_ARCH_CPU_INIT
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
48#define CONFIG_SKIP_LOWLEVEL_INIT
49#define CONFIG_BOARD_EARLY_INIT_F
50#define CONFIG_DISPLAY_CPUINFO
51
52#define CONFIG_CMD_BOOTZ
53#define CONFIG_OF_LIBFDT
54
55/* general purpose I/O */
56#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
57#define CONFIG_AT91_GPIO
58#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
59
60/* serial console */
61#define CONFIG_ATMEL_USART
62#define CONFIG_USART_BASE ATMEL_BASE_DBGU
63#define CONFIG_USART_ID ATMEL_ID_SYS
64#define CONFIG_BAUDRATE 115200
65
66#define CONFIG_BOOTDELAY 3
67
68/*
69 * Command line configuration.
70 */
71#include <config_cmd_default.h>
72#undef CONFIG_CMD_BDI
73#undef CONFIG_CMD_FPGA
74#undef CONFIG_CMD_IMI
75#undef CONFIG_CMD_IMLS
76#undef CONFIG_CMD_LOADS
77#undef CONFIG_CMD_SOURCE
78
79#define CONFIG_CMD_PING
80#define CONFIG_CMD_DHCP
81#define CONFIG_CMD_NAND
82
83/*
84 * SDRAM: 1 bank, min 32, max 128 MB
85 * Initialized before u-boot gets started.
86 */
87#define CONFIG_NR_DRAM_BANKS 1
88#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
89#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
90
91/*
92 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
93 * leaving the correct space for initial global data structure above
94 * that address while providing maximum stack area below.
95 */
96# define CONFIG_SYS_INIT_SP_ADDR \
97 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
98
99/* NAND flash */
100#ifdef CONFIG_CMD_NAND
101#define CONFIG_NAND_ATMEL
102#define CONFIG_SYS_MAX_NAND_DEVICE 1
103#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
104#define CONFIG_SYS_NAND_DBW_8
105#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
106#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
107#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
108#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
109#endif
110
111/* NOR flash - no real flash on this board */
112#define CONFIG_SYS_NO_FLASH 1
113
114/* Ethernet */
115#define CONFIG_MACB
116#define CONFIG_RMII
117#define CONFIG_AT91_WANTS_COMMON_PHY
118
119/* USB */
120#if defined(CONFIG_BOARD_TAURUS)
121#define CONFIG_USB_ATMEL
122#define CONFIG_USB_OHCI_NEW
123#define CONFIG_SYS_USB_OHCI_CPU_INIT
124#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
125#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
126#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
127#define CONFIG_USB_STORAGE
128#endif
129
Heiko Schocher398b45b2014-10-31 08:30:56 +0100130/* SPI EEPROM */
131#define CONFIG_SPI
132#define CONFIG_CMD_SPI
133#define CONFIG_CMD_SF
134#define CONFIG_SPI_FLASH
135#define CONFIG_ATMEL_SPI
136#define CONFIG_SPI_FLASH_STMICRO
137#define TAURUS_SPI_MASK (1 << 4)
138#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
139
Heiko Schochercfcad352013-12-02 07:47:22 +0100140/* load address */
141#define CONFIG_SYS_LOAD_ADDR 0x22000000
142
143/* bootstrap in spi flash , u-boot + env + linux in nandflash */
144#define CONFIG_ENV_IS_IN_NAND
145#define CONFIG_ENV_OFFSET 0x100000
146#define CONFIG_ENV_OFFSET_REDUND 0x180000
147#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
148#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
149#define CONFIG_BOOTARGS \
150 "console=ttyS0,115200 earlyprintk " \
151 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
152 "256k(env),256k(env_redundant),256k(spare)," \
153 "512k(dtb),6M(kernel)ro,-(rootfs) " \
154 "root=/dev/mtdblock7 rw rootfstype=jffs2"
155
156#define CONFIG_SYS_PROMPT "U-Boot> "
157#define CONFIG_SYS_CBSIZE 256
158#define CONFIG_SYS_MAXARGS 16
159#define CONFIG_SYS_PBSIZE \
160 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
161#define CONFIG_SYS_LONGHELP
162#define CONFIG_CMDLINE_EDITING
163#define CONFIG_AUTO_COMPLETE
164
165/*
166 * Size of malloc() pool
167 */
168#define CONFIG_SYS_MALLOC_LEN \
169 ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
170
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100171/* Defines for SPL */
172#define CONFIG_SPL_FRAMEWORK
173#define CONFIG_SPL_TEXT_BASE 0x0
174#define CONFIG_SPL_MAX_SIZE (11 * 1024)
175#define CONFIG_SPL_STACK (16 * 1024)
176
177#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
178#define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024)
179
180#define CONFIG_SPL_LIBCOMMON_SUPPORT
181#define CONFIG_SPL_LIBGENERIC_SUPPORT
182#define CONFIG_SPL_SERIAL_SUPPORT
183
184#define CONFIG_SPL_BOARD_INIT
185#define CONFIG_SPL_GPIO_SUPPORT
186#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
187#define CONFIG_SPL_NAND_SUPPORT
188#define CONFIG_SYS_USE_NANDFLASH 1
189#define CONFIG_SPL_NAND_DRIVERS
190#define CONFIG_SPL_NAND_BASE
191#define CONFIG_SPL_NAND_ECC
192#define CONFIG_SPL_NAND_RAW_ONLY
193#define CONFIG_SPL_NAND_SOFTECC
194#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
195#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
196#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
197#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
198#define CONFIG_SYS_NAND_5_ADDR_CYCLE
199
200#define CONFIG_SYS_NAND_SIZE (256*1024*1024)
201#define CONFIG_SYS_NAND_PAGE_SIZE 2048
202#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
203#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
204 CONFIG_SYS_NAND_PAGE_SIZE)
205#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
206#define CONFIG_SYS_NAND_ECCSIZE 256
207#define CONFIG_SYS_NAND_ECCBYTES 3
208#define CONFIG_SYS_NAND_OOBSIZE 64
209#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
210 48, 49, 50, 51, 52, 53, 54, 55, \
211 56, 57, 58, 59, 60, 61, 62, 63, }
212
213
214#define CONFIG_SPL_ATMEL_SIZE
215#define CONFIG_SYS_MASTER_CLOCK 132096000
216#define AT91_PLL_LOCK_TIMEOUT 1000000
217#define CONFIG_SYS_AT91_PLLA 0x202A3F01
218#define CONFIG_SYS_MCKR 0x1300
219#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
220#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schochercfcad352013-12-02 07:47:22 +0100221#endif